An implementation methodology for Neural Network on a Low-end FPGA Board

Kaijie Wei, Koki Honda, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Artificial Intelligence(AI) has achieved unprecedented success in various fields including image/speech recognition which is useful for edge computing. Most of AI systems are implemented on power-hungry devices like GPU, high-end FPGA, or even TPU to process data with high performance. However, these energy budgets are often not affordable to edge computing. Low-end FPGA taking advantage of high energy-efficiency is a desirable platform to meet the requirements of image recognition working on small autonomous vehicles. In this paper, we propose the design methodology and implementation to adapt a neural network system to a low-end FPGA board using HLS description. The whole design consists of algorithm-level downscaling and hardware optimization. The former emphasizes the model downscale by considering accuracy. The latter applies various HLS design techniques to speed-up the application running on the target board. In the case study of tiny YOLO (You Only Look Once) v3, the model running on PYNQ-Z1 presents up to 22× acceleration comparing with the PYNQ ARM CPU. Energy efficiency also achieves 3× better than Xeon E5-2667.

Original languageEnglish
Title of host publicationProceedings - 2020 8th International Symposium on Computing and Networking, CANDAR 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages228-234
Number of pages7
ISBN (Electronic)9781728182216
DOIs
Publication statusPublished - 2020 Nov
Event8th International Symposium on Computing and Networking, CANDAR 2020 - Virtual, Naha, Japan
Duration: 2020 Nov 242020 Nov 27

Publication series

NameProceedings - 2020 8th International Symposium on Computing and Networking, CANDAR 2020

Conference

Conference8th International Symposium on Computing and Networking, CANDAR 2020
Country/TerritoryJapan
CityVirtual, Naha
Period20/11/2420/11/27

Keywords

  • Compression
  • FPGA
  • HLS streaming
  • Neural network
  • Object detection

ASJC Scopus subject areas

  • Artificial Intelligence
  • Computational Theory and Mathematics
  • Computer Networks and Communications
  • Computer Science Applications
  • Software

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