An inductive-coupling link for 3-D Network-on-Chips

Junichiro Kadomoto; Hideharu Amano; Tadahiro Kuroda

doi:10.1109/ISOCC.2017.8368841

An inductive-coupling link for 3-D Network-on-Chips

Junichiro Kadomoto, Hideharu Amano, Tadahiro Kuroda

Department of Information and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

An inductive-coupling link for 3-D network-on-chips (NoC) is presented. Inductively coupled coils allow high-speed wireless communication between stacked chips. 35-bit parallel input data are serialized and transmitted. Silicon measurements from test chips implementing transceiver circuits, in 65 nm SOI CMOS technology demonstrate 875 Mb/s operation.

Original language	English
Title of host publication	Proceedings - International SoC Design Conference 2017, ISOCC 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	150-151
Number of pages	2
ISBN (Electronic)	9781538622858
DOIs	https://doi.org/10.1109/ISOCC.2017.8368841
Publication status	Published - 2018 May 29
Event	14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of Duration: 2017 Nov 5 → 2017 Nov 8

Publication series

Name	Proceedings - International SoC Design Conference 2017, ISOCC 2017

Other

Other	14th International SoC Design Conference, ISOCC 2017
Country	Korea, Republic of
City	Seoul
Period	17/11/5 → 17/11/8

Keywords

3-D integration
Inductive-coupling link
Network-on-chips (NoC)

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/ISOCC.2017.8368841

Fingerprint Dive into the research topics of 'An inductive-coupling link for 3-D Network-on-Chips'. Together they form a unique fingerprint.

Cite this

An inductive-coupling link for 3-D Network-on-Chips. / Kadomoto, Junichiro; Amano, Hideharu; Kuroda, Tadahiro.

Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 150-151 (Proceedings - International SoC Design Conference 2017, ISOCC 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kadomoto, J, Amano, H & Kuroda, T 2018, An inductive-coupling link for 3-D Network-on-Chips. in Proceedings - International SoC Design Conference 2017, ISOCC 2017. Proceedings - International SoC Design Conference 2017, ISOCC 2017, Institute of Electrical and Electronics Engineers Inc., pp. 150-151, 14th International SoC Design Conference, ISOCC 2017, Seoul, Korea, Republic of, 17/11/5. https://doi.org/10.1109/ISOCC.2017.8368841

@inproceedings{2b61d9429df44e2eb68caebcbdcadbfd,

title = "An inductive-coupling link for 3-D Network-on-Chips",

abstract = "An inductive-coupling link for 3-D network-on-chips (NoC) is presented. Inductively coupled coils allow high-speed wireless communication between stacked chips. 35-bit parallel input data are serialized and transmitted. Silicon measurements from test chips implementing transceiver circuits, in 65 nm SOI CMOS technology demonstrate 875 Mb/s operation.",

keywords = "3-D integration, Inductive-coupling link, Network-on-chips (NoC)",

author = "Junichiro Kadomoto and Hideharu Amano and Tadahiro Kuroda",

year = "2018",

month = may,

day = "29",

doi = "10.1109/ISOCC.2017.8368841",

language = "English",

series = "Proceedings - International SoC Design Conference 2017, ISOCC 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "150--151",

booktitle = "Proceedings - International SoC Design Conference 2017, ISOCC 2017",

note = "14th International SoC Design Conference, ISOCC 2017 ; Conference date: 05-11-2017 Through 08-11-2017",

}

TY - GEN

T1 - An inductive-coupling link for 3-D Network-on-Chips

AU - Kadomoto, Junichiro

AU - Amano, Hideharu

AU - Kuroda, Tadahiro

PY - 2018/5/29

Y1 - 2018/5/29

N2 - An inductive-coupling link for 3-D network-on-chips (NoC) is presented. Inductively coupled coils allow high-speed wireless communication between stacked chips. 35-bit parallel input data are serialized and transmitted. Silicon measurements from test chips implementing transceiver circuits, in 65 nm SOI CMOS technology demonstrate 875 Mb/s operation.

AB - An inductive-coupling link for 3-D network-on-chips (NoC) is presented. Inductively coupled coils allow high-speed wireless communication between stacked chips. 35-bit parallel input data are serialized and transmitted. Silicon measurements from test chips implementing transceiver circuits, in 65 nm SOI CMOS technology demonstrate 875 Mb/s operation.

KW - 3-D integration

KW - Inductive-coupling link

KW - Network-on-chips (NoC)

UR - http://www.scopus.com/inward/record.url?scp=85048867813&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85048867813&partnerID=8YFLogxK

U2 - 10.1109/ISOCC.2017.8368841

DO - 10.1109/ISOCC.2017.8368841

M3 - Conference contribution

AN - SCOPUS:85048867813

T3 - Proceedings - International SoC Design Conference 2017, ISOCC 2017

SP - 150

EP - 151

BT - Proceedings - International SoC Design Conference 2017, ISOCC 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 14th International SoC Design Conference, ISOCC 2017

Y2 - 5 November 2017 through 8 November 2017

ER -