TY - GEN
T1 - An inductive-coupling link for 3-D Network-on-Chips
AU - Kadomoto, Junichiro
AU - Amano, Hideharu
AU - Kuroda, Tadahiro
PY - 2018/5/29
Y1 - 2018/5/29
N2 - An inductive-coupling link for 3-D network-on-chips (NoC) is presented. Inductively coupled coils allow high-speed wireless communication between stacked chips. 35-bit parallel input data are serialized and transmitted. Silicon measurements from test chips implementing transceiver circuits, in 65 nm SOI CMOS technology demonstrate 875 Mb/s operation.
AB - An inductive-coupling link for 3-D network-on-chips (NoC) is presented. Inductively coupled coils allow high-speed wireless communication between stacked chips. 35-bit parallel input data are serialized and transmitted. Silicon measurements from test chips implementing transceiver circuits, in 65 nm SOI CMOS technology demonstrate 875 Mb/s operation.
KW - 3-D integration
KW - Inductive-coupling link
KW - Network-on-chips (NoC)
UR - http://www.scopus.com/inward/record.url?scp=85048867813&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85048867813&partnerID=8YFLogxK
U2 - 10.1109/ISOCC.2017.8368841
DO - 10.1109/ISOCC.2017.8368841
M3 - Conference contribution
AN - SCOPUS:85048867813
T3 - Proceedings - International SoC Design Conference 2017, ISOCC 2017
SP - 150
EP - 151
BT - Proceedings - International SoC Design Conference 2017, ISOCC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 14th International SoC Design Conference, ISOCC 2017
Y2 - 5 November 2017 through 8 November 2017
ER -