An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM

Kiichi Niitsu, Yasuhisa Shimazaki, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Itaru Nonomura, Makoto Saen, Shigenobu Komatsu, Kenichi Osada, Naohiko Irie, Toshihiro Hattori, Atsushi Hasegawa, Tadahiro Kuroda

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    51 Citations (Scopus)
    Original languageEnglish
    Title of host publication2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages480-482
    Number of pages3
    ISBN (Print)1424434580, 9781424434589
    DOIs
    Publication statusPublished - 2009
    Event2009 IEEE International Solid-State Circuits Conference ISSCC 2009 - San Francisco, CA, United States
    Duration: 2009 Feb 82009 Feb 12

    Publication series

    NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
    ISSN (Print)0193-6530

    Other

    Other2009 IEEE International Solid-State Circuits Conference ISSCC 2009
    CountryUnited States
    CitySan Francisco, CA
    Period09/2/809/2/12

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

    Cite this

    Niitsu, K., Shimazaki, Y., Sugimori, Y., Kohama, Y., Kasuga, K., Nonomura, I., Saen, M., Komatsu, S., Osada, K., Irie, N., Hattori, T., Hasegawa, A., & Kuroda, T. (2009). An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM. In 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009 (pp. 480-482). [4977517] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC.2009.4977517