TY - JOUR
T1 - An integration of imprecise computation model and real-time voltage and frequency scaling on responsive multithreaded processor
AU - Mizotani, Keigo
AU - Hatori, Yusuke
AU - Kumura, Yusuke
AU - Takasu, Masayoshi
AU - Chishiro, Hiroyuki
AU - Yamasaki, Nobuyuki
N1 - Funding Information:
This research was supported in part by Keio Gijuku Academic Development Funds, Keio Kougakukai, and CREST, JST.
Publisher Copyright:
© 2015 ISCA.
PY - 2015/9
Y1 - 2015/9
N2 - As microprocessor performance grows, high throughput and power management have been important on embedded real-time systems. Real-Time Voltage and Frequency Scaling (RT-VFS) has been proposed to reduce power consumption and ensure real-time constraints. An imprecise computation model adds an optional part to Liu and Layland’s model to improve the quality of computations. However, the trade-off between power consumption and quality of computations has not been well investigated on actual systems. This paper proposes the scheme to integrate an imprecise computation model and RT-VFS to improve the quality of computations and reduce the power consumption within real-time constraints. Moreover, we implement this scheme on Dependable Responsive Multithreaded Processor (D-RMTP), which is a prioritized simultaneous multithreaded processor for embedded real-time systems. We implement the proposed scheme by use of D-RMTP original features. Through experimental evaluation, we show that the proposed scheme satisfies both the lower energy consumption and higher quality of computations on actual systems. In particular, the proposed scheme achieves a maximum of 135% improvement of the quality of computations per energy consumption.
AB - As microprocessor performance grows, high throughput and power management have been important on embedded real-time systems. Real-Time Voltage and Frequency Scaling (RT-VFS) has been proposed to reduce power consumption and ensure real-time constraints. An imprecise computation model adds an optional part to Liu and Layland’s model to improve the quality of computations. However, the trade-off between power consumption and quality of computations has not been well investigated on actual systems. This paper proposes the scheme to integrate an imprecise computation model and RT-VFS to improve the quality of computations and reduce the power consumption within real-time constraints. Moreover, we implement this scheme on Dependable Responsive Multithreaded Processor (D-RMTP), which is a prioritized simultaneous multithreaded processor for embedded real-time systems. We implement the proposed scheme by use of D-RMTP original features. Through experimental evaluation, we show that the proposed scheme satisfies both the lower energy consumption and higher quality of computations on actual systems. In particular, the proposed scheme achieves a maximum of 135% improvement of the quality of computations per energy consumption.
KW - Embedded real-time systems
KW - Imprecise computation model
KW - Power consumption
KW - RT-VFS
KW - Responsive multithreaded processor
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M3 - Article
AN - SCOPUS:85011281849
SN - 1076-5204
VL - 22
SP - 128
EP - 136
JO - International Journal of Computers and their Applications
JF - International Journal of Computers and their Applications
IS - 3
ER -