An On-Chip Scalable Low Power Consumption High-Voltage Driver Based on Standard CMOS Technology

Jorge Canada, Yui Yoshida, Hiroki Miura, Nobuhiko Nakano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A scalable low power consumption high-voltage driver comprising only standard low-voltage CMOS transistors is proposed. The circuit is a Stacked MOSFET high-voltage driver. The proposed design stands out for its low power consumption (in the order of microwatts), small area, scalability and self-sufficiency. The main setbacks to be considered are its low switching speed, in the order of microseconds, and the fact that its applicability is limited to capacitive loads and high resistive loads. This paper reports simulation results obtained through the implementation of multiple designs in 0.18 um CMOS technology.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference, ISOCC 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages17-18
Number of pages2
ISBN (Electronic)9781728183312
DOIs
Publication statusPublished - 2020 Oct 21
Event17th International System-on-Chip Design Conference, ISOCC 2020 - Yeosu, Korea, Republic of
Duration: 2020 Oct 212020 Oct 24

Publication series

NameProceedings - International SoC Design Conference, ISOCC 2020

Conference

Conference17th International System-on-Chip Design Conference, ISOCC 2020
CountryKorea, Republic of
CityYeosu
Period20/10/2120/10/24

Keywords

  • high voltage driver
  • low power consumption
  • on-chip
  • stacked MOSFET
  • standard CMOS

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering
  • Instrumentation
  • Artificial Intelligence
  • Hardware and Architecture

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