Analysis and design of transceiver circuit and inductor layout for inductive inter-chip wireless superconnect

Noriyuki Miura, Daisuke Mizoguchi, Yusmeeraz Binti Yusof, Takayasu Sakurai, Tadahiro Kuroda

    Research output: Contribution to conferencePaper

    21 Citations (Scopus)

    Abstract

    A wireless bus for stacked chips was developed by utilizing inductive coupling among them. This paper discusses inductor layout optimization and transceiver circuit design. The inductive coupling is analyzed by an equivalent circuit model, parameters of which are extracted by a magnetic field model based on the Biot-Savart law. Given communications distance, transmit power, and SNR budget, inductor layout size is minimized. Two receiver circuits, signal sensitive and yet noise immune, are designed for inductive Non-Return-to-Zero (NRZ) signaling where no signal is transmitted when data remains the same. A test chip was fabricated in 0.35μm CMOS. Accuracy of the models is verified. Bit error rate is investigated for various inductor layouts and communications distance. The maximum data rate is 1.25Gb/s/channel. Power dissipation is 43mW in the transmitter and 2.6mW in the receiver at 3.3V. If chip thickness is reduced to 30μm in 90nm device generation, power dissipation will be ImW/channel or bandwidth will be ITb/s/mm2.

    Original languageEnglish
    Pages246-249
    Number of pages4
    Publication statusPublished - 2004 Sep 29
    Event2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI - Honolulu, HI, United States
    Duration: 2004 Jun 172004 Jun 19

    Other

    Other2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI
    CountryUnited States
    CityHonolulu, HI
    Period04/6/1704/6/19

    Keywords

    • High bandwidth
    • Inductor
    • Low power
    • SiP
    • Wireless bus

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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  • Cite this

    Miura, N., Mizoguchi, D., Yusof, Y. B., Sakurai, T., & Kuroda, T. (2004). Analysis and design of transceiver circuit and inductor layout for inductive inter-chip wireless superconnect. 246-249. Paper presented at 2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI, Honolulu, HI, United States.