Analytical single-electron transistor (SET) model for design and analysis of realistic SET circuits

Ken Uchida, Kazuya Matsuzawa, Junji Koga, Ryuji Ohba, Shin Ichi Takagi, Akira Toriumi

    Research output: Contribution to journalArticlepeer-review

    91 Citations (Scopus)

    Abstract

    In this work, we propose a compact, physically based, analytical single-electron transistor (SET) model suitable for the design and analysis of realistic SET circuits. The model is derived on the basis of the "orthodox" theory of correlated single-electron tunneling and the steady-state master equation method. The SET inverter characteristics are successfully calculated using the model implemented in the simulation program with integrated circuit emphasis (SPICE). The hybrid circuit of SETs with metal-oxide-semiconductor field-effect transistors (MOSFETs) is also successfully simulated. By utilizing the model, it is clarified that the drain-voltage-induced shift of the gate voltage dependence of SET current reaches one-half of the drain voltage in the case of a completely symmetric SET.

    Original languageEnglish
    Pages (from-to)2321-2324
    Number of pages4
    JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
    Volume39
    Issue number4 B
    Publication statusPublished - 2000 Dec 1

    Keywords

    • Circuit simulation
    • Coulomb blockade
    • Device modeling
    • Master equation
    • Orthodox theory
    • SET
    • SPICE
    • Single-electron tunneling

    ASJC Scopus subject areas

    • Engineering(all)
    • Physics and Astronomy(all)

    Fingerprint Dive into the research topics of 'Analytical single-electron transistor (SET) model for design and analysis of realistic SET circuits'. Together they form a unique fingerprint.

    Cite this