### Abstract

We show how the execution time of algorithms on quantum computers depends on the architecture of the quantum computer, the choice of algorithms (including subroutines such as arithmetic), and the "clock speed" of the quantum computer. The primary architectural features of interest are the ability to execute multiple gates concurrently, the number of application-level qubits available, and the interconnection network of qubits. We analyze Shor's algorithm for factoring large numbers in this context. Our results show that, if arbitrary interconnection of qubits is possible, a machine with an application-level clock speed of as low as one-third of a (possibly encoded) gate per second could factor a 576-bit number in under one month, potentially outperforming a large network of classical computers. For nearest-neighbor-only architectures, a clock speed of around twenty-seven gates per second is required.

Original language | English |
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Title of host publication | MS+S 2006 - Controllable Quantum States: Mesoscopic Superconductivity and Spintronics, Proceedings of the International Symposium |

Publisher | World Scientific Publishing Co. Pte Ltd |

Pages | 183-188 |

Number of pages | 6 |

ISBN (Print) | 9812814612, 9789812814616 |

Publication status | Published - 2008 |

Event | 4th International Symposium on Mesoscopic Superconductivity and Spintronics, MS+S 2006 - Atsugi, Japan Duration: 2006 Feb 27 → 2006 Mar 2 |

### Other

Other | 4th International Symposium on Mesoscopic Superconductivity and Spintronics, MS+S 2006 |
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Country | Japan |

City | Atsugi |

Period | 06/2/27 → 06/3/2 |

### Fingerprint

### ASJC Scopus subject areas

- Electrical and Electronic Engineering

### Cite this

*MS+S 2006 - Controllable Quantum States: Mesoscopic Superconductivity and Spintronics, Proceedings of the International Symposium*(pp. 183-188). World Scientific Publishing Co. Pte Ltd.

**Architecture-dependent execution time of Shor's algorithm.** / Van Meter, Rodney D; Itoh, Kohei M; Ladd, Thaddeus D.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

*MS+S 2006 - Controllable Quantum States: Mesoscopic Superconductivity and Spintronics, Proceedings of the International Symposium.*World Scientific Publishing Co. Pte Ltd, pp. 183-188, 4th International Symposium on Mesoscopic Superconductivity and Spintronics, MS+S 2006, Atsugi, Japan, 06/2/27.

}

TY - GEN

T1 - Architecture-dependent execution time of Shor's algorithm

AU - Van Meter, Rodney D

AU - Itoh, Kohei M

AU - Ladd, Thaddeus D.

PY - 2008

Y1 - 2008

N2 - We show how the execution time of algorithms on quantum computers depends on the architecture of the quantum computer, the choice of algorithms (including subroutines such as arithmetic), and the "clock speed" of the quantum computer. The primary architectural features of interest are the ability to execute multiple gates concurrently, the number of application-level qubits available, and the interconnection network of qubits. We analyze Shor's algorithm for factoring large numbers in this context. Our results show that, if arbitrary interconnection of qubits is possible, a machine with an application-level clock speed of as low as one-third of a (possibly encoded) gate per second could factor a 576-bit number in under one month, potentially outperforming a large network of classical computers. For nearest-neighbor-only architectures, a clock speed of around twenty-seven gates per second is required.

AB - We show how the execution time of algorithms on quantum computers depends on the architecture of the quantum computer, the choice of algorithms (including subroutines such as arithmetic), and the "clock speed" of the quantum computer. The primary architectural features of interest are the ability to execute multiple gates concurrently, the number of application-level qubits available, and the interconnection network of qubits. We analyze Shor's algorithm for factoring large numbers in this context. Our results show that, if arbitrary interconnection of qubits is possible, a machine with an application-level clock speed of as low as one-third of a (possibly encoded) gate per second could factor a 576-bit number in under one month, potentially outperforming a large network of classical computers. For nearest-neighbor-only architectures, a clock speed of around twenty-seven gates per second is required.

UR - http://www.scopus.com/inward/record.url?scp=84903886258&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84903886258&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:84903886258

SN - 9812814612

SN - 9789812814616

SP - 183

EP - 188

BT - MS+S 2006 - Controllable Quantum States: Mesoscopic Superconductivity and Spintronics, Proceedings of the International Symposium

PB - World Scientific Publishing Co. Pte Ltd

ER -