Architecture design of versatile recognition processor for sensornet applications

Yuichi Hori, Yuya Hanai, Jun Nishimura, Tadahiro Kuroda

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

This article presents the multiobject parallel recognition architecture of a versatile recognition processor (VRP) that detects and recognizes objects from images, videos, sounds, and acceleration signals. It offers eight times better power efficiency than conventional object recognition processors, making it ideal for mobile application platforms and wireless sensor network systems.

Original languageEnglish
Article number5372155
Pages (from-to)44-57
Number of pages14
JournalIEEE Micro
Volume29
Issue number6
DOIs
Publication statusPublished - 2009 Nov

Fingerprint

Object recognition
Wireless sensor networks
Acoustic waves

Keywords

  • AdaBoost
  • Haar-like feature
  • Low power
  • Real time
  • Recognition
  • Wireless sensor network

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Software

Cite this

Architecture design of versatile recognition processor for sensornet applications. / Hori, Yuichi; Hanai, Yuya; Nishimura, Jun; Kuroda, Tadahiro.

In: IEEE Micro, Vol. 29, No. 6, 5372155, 11.2009, p. 44-57.

Research output: Contribution to journalArticle

Hori, Yuichi ; Hanai, Yuya ; Nishimura, Jun ; Kuroda, Tadahiro. / Architecture design of versatile recognition processor for sensornet applications. In: IEEE Micro. 2009 ; Vol. 29, No. 6. pp. 44-57.
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