Artificial intelligence of Blokus Duo on FPGA using Cyber Work Bench

Naru Sugimoto, Takaaki Miyajima, Takuya Kuhara, Yuki Katuta, Takushi Mitsuichi, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

This paper presents a design of an FPGA-based Blokus Duo solver. It searches a game tree by using the miniMax algorithm with alpha-beta pruning and move ordering. In addition, HLS tool called CyberWorkBench (CWB) is used to implement hardware. By making the use of functions in CWB, parallel fully pipelined design is generated. The implemented solver works at 100MHz with Xilinx Spartan-6 XC6SLX45 FPGA on the Digilent Atlys board. It can search states after three moves in most cases.

Original languageEnglish
Title of host publicationFPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology
Pages498-501
Number of pages4
DOIs
Publication statusPublished - 2013 Dec 1
Event2013 12th International Conference on Field-Programmable Technology, FPT 2013 - Kyoto, Japan
Duration: 2013 Dec 92013 Dec 11

Publication series

NameFPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology

Other

Other2013 12th International Conference on Field-Programmable Technology, FPT 2013
CountryJapan
CityKyoto
Period13/12/913/12/11

ASJC Scopus subject areas

  • Software

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