BIPOLAR GBIT/S 8 multiplied by 8 BIT S/P, P/S CONVERTER LSI.

Michihiro Hirata, Masao Suzuki, Naoaki Yamanaka, Yousuke Yamamoto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

A Si bipolar very high-speed 8-channel multiplied by 8-bit Serial/Parallel and Parallel/Serial conversion LSI (SPPS-LSI), having 1. 5 Gb/s throughput is developed for high-speed digital communication systems. To achieve high performance, a novel data conversion method is adopted. By applying a sophisticated circuit design and SST-1A process technology, a high-speed and low-power LSI is achieved with small chip size.

Original languageEnglish
Title of host publicationConference on Solid State Devices and Materials
PublisherBusiness Cent for Academic Soc Japan
Pages271-274
Number of pages4
ISBN (Print)493081314X
Publication statusPublished - 1986
Externally publishedYes

Fingerprint

Digital communication systems
Throughput
Networks (circuits)

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Hirata, M., Suzuki, M., Yamanaka, N., & Yamamoto, Y. (1986). BIPOLAR GBIT/S 8 multiplied by 8 BIT S/P, P/S CONVERTER LSI. In Conference on Solid State Devices and Materials (pp. 271-274). Business Cent for Academic Soc Japan.

BIPOLAR GBIT/S 8 multiplied by 8 BIT S/P, P/S CONVERTER LSI. / Hirata, Michihiro; Suzuki, Masao; Yamanaka, Naoaki; Yamamoto, Yousuke.

Conference on Solid State Devices and Materials. Business Cent for Academic Soc Japan, 1986. p. 271-274.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hirata, M, Suzuki, M, Yamanaka, N & Yamamoto, Y 1986, BIPOLAR GBIT/S 8 multiplied by 8 BIT S/P, P/S CONVERTER LSI. in Conference on Solid State Devices and Materials. Business Cent for Academic Soc Japan, pp. 271-274.
Hirata M, Suzuki M, Yamanaka N, Yamamoto Y. BIPOLAR GBIT/S 8 multiplied by 8 BIT S/P, P/S CONVERTER LSI. In Conference on Solid State Devices and Materials. Business Cent for Academic Soc Japan. 1986. p. 271-274
Hirata, Michihiro ; Suzuki, Masao ; Yamanaka, Naoaki ; Yamamoto, Yousuke. / BIPOLAR GBIT/S 8 multiplied by 8 BIT S/P, P/S CONVERTER LSI. Conference on Solid State Devices and Materials. Business Cent for Academic Soc Japan, 1986. pp. 271-274
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