Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology

Honlian Su, Yu Fujita, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Abstract

For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). A real chip using a 65nm experimental process achieved a sustained performance of 192MOPS with a power supply of 0.4V and power consumption of 1.7mW. A clock frequency of 89MHz was achieved with a power supply of just 0.4V when a forward bias voltage was given. When using a reverse bias, the leakage current could be suppressed to less than 20μW in the stand-by mode. The key concept of CMA-SOTB is maintaining a balance between performance and leakage current by independently controlling the bias voltages of the PE array and the microcontroller. Evaluations of the operational frequency and power consumption of filter application programs shed light on how to find the combination of bias voltages that achieves the best energy efficiency for a required performance. The range of advantageous power supply voltage for a required performance considering the body bias was also found.

Original languageEnglish
Title of host publicationConference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9783000446450
DOIs
Publication statusPublished - 2014 Oct 16
Event24th International Conference on Field Programmable Logic and Applications, FPL 2014 - Munich, Germany
Duration: 2014 Sep 12014 Sep 5

Other

Other24th International Conference on Field Programmable Logic and Applications, FPL 2014
CountryGermany
CityMunich
Period14/9/114/9/5

Fingerprint

Bias voltage
Particle accelerators
Leakage currents
Silicon
Electric power utilization
Low power electronics
Microcontrollers
Application programs
Energy efficiency
Clocks
Electric potential
Processing

ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture

Cite this

Su, H., Fujita, Y., & Amano, H. (2014). Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology. In Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014 [6927486] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FPL.2014.6927486

Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology. / Su, Honlian; Fujita, Yu; Amano, Hideharu.

Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014. Institute of Electrical and Electronics Engineers Inc., 2014. 6927486.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Su, H, Fujita, Y & Amano, H 2014, Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology. in Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014., 6927486, Institute of Electrical and Electronics Engineers Inc., 24th International Conference on Field Programmable Logic and Applications, FPL 2014, Munich, Germany, 14/9/1. https://doi.org/10.1109/FPL.2014.6927486
Su H, Fujita Y, Amano H. Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology. In Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014. Institute of Electrical and Electronics Engineers Inc. 2014. 6927486 https://doi.org/10.1109/FPL.2014.6927486
Su, Honlian ; Fujita, Yu ; Amano, Hideharu. / Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology. Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014. Institute of Electrical and Electronics Engineers Inc., 2014.
@inproceedings{7788bc9c5d474cb2b2378f7bdb9c434c,
title = "Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology",
abstract = "For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). A real chip using a 65nm experimental process achieved a sustained performance of 192MOPS with a power supply of 0.4V and power consumption of 1.7mW. A clock frequency of 89MHz was achieved with a power supply of just 0.4V when a forward bias voltage was given. When using a reverse bias, the leakage current could be suppressed to less than 20μW in the stand-by mode. The key concept of CMA-SOTB is maintaining a balance between performance and leakage current by independently controlling the bias voltages of the PE array and the microcontroller. Evaluations of the operational frequency and power consumption of filter application programs shed light on how to find the combination of bias voltages that achieves the best energy efficiency for a required performance. The range of advantageous power supply voltage for a required performance considering the body bias was also found.",
author = "Honlian Su and Yu Fujita and Hideharu Amano",
year = "2014",
month = "10",
day = "16",
doi = "10.1109/FPL.2014.6927486",
language = "English",
isbn = "9783000446450",
booktitle = "Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology

AU - Su, Honlian

AU - Fujita, Yu

AU - Amano, Hideharu

PY - 2014/10/16

Y1 - 2014/10/16

N2 - For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). A real chip using a 65nm experimental process achieved a sustained performance of 192MOPS with a power supply of 0.4V and power consumption of 1.7mW. A clock frequency of 89MHz was achieved with a power supply of just 0.4V when a forward bias voltage was given. When using a reverse bias, the leakage current could be suppressed to less than 20μW in the stand-by mode. The key concept of CMA-SOTB is maintaining a balance between performance and leakage current by independently controlling the bias voltages of the PE array and the microcontroller. Evaluations of the operational frequency and power consumption of filter application programs shed light on how to find the combination of bias voltages that achieves the best energy efficiency for a required performance. The range of advantageous power supply voltage for a required performance considering the body bias was also found.

AB - For low power yet high performance processing in battery driven devices, a coarse grained reconfigurable accelerator called Cool Mega Array (CMA)-SOTB is implemented by using Silicon on Thin BOX (SOTB), a new process technology developed by the Low-power Electronics Association & Project (LEAP). A real chip using a 65nm experimental process achieved a sustained performance of 192MOPS with a power supply of 0.4V and power consumption of 1.7mW. A clock frequency of 89MHz was achieved with a power supply of just 0.4V when a forward bias voltage was given. When using a reverse bias, the leakage current could be suppressed to less than 20μW in the stand-by mode. The key concept of CMA-SOTB is maintaining a balance between performance and leakage current by independently controlling the bias voltages of the PE array and the microcontroller. Evaluations of the operational frequency and power consumption of filter application programs shed light on how to find the combination of bias voltages that achieves the best energy efficiency for a required performance. The range of advantageous power supply voltage for a required performance considering the body bias was also found.

UR - http://www.scopus.com/inward/record.url?scp=84911164903&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84911164903&partnerID=8YFLogxK

U2 - 10.1109/FPL.2014.6927486

DO - 10.1109/FPL.2014.6927486

M3 - Conference contribution

AN - SCOPUS:84911164903

SN - 9783000446450

BT - Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014

PB - Institute of Electrical and Electronics Engineers Inc.

ER -