TY - GEN
T1 - Building block multi-chip systems using inductive coupling through chip interface
AU - Amano, Hideharu
AU - Kuroda, Tadahiro
AU - Nakamura, Hiroshi
AU - Usami, Kimiyoshi
AU - Kondo, Masaaki
AU - Matsutani, Hiroki
AU - Namiki, Mitaro
PY - 2018/5/29
Y1 - 2018/5/29
N2 - A building block computing system is consisting of multiple chips connecting with inductive coupling wireless through chip interconnect. Like building Lego blocks, various types of systems can be built by stacking different types of chips. In order to develop such systems, several techniques are investigated in the project: that is, inductive coupling wireless through chip interface, low power circuit technologies, autonomous interconnection network architectures, thermal dissipation and building block operating system. Here, the overview of the project and a prototype system are introduced.
AB - A building block computing system is consisting of multiple chips connecting with inductive coupling wireless through chip interconnect. Like building Lego blocks, various types of systems can be built by stacking different types of chips. In order to develop such systems, several techniques are investigated in the project: that is, inductive coupling wireless through chip interface, low power circuit technologies, autonomous interconnection network architectures, thermal dissipation and building block operating system. Here, the overview of the project and a prototype system are introduced.
KW - Building block computing systems
KW - System-in-a Package
KW - Wireless inductive coupling
UR - http://www.scopus.com/inward/record.url?scp=85048873655&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85048873655&partnerID=8YFLogxK
U2 - 10.1109/ISOCC.2017.8368842
DO - 10.1109/ISOCC.2017.8368842
M3 - Conference contribution
AN - SCOPUS:85048873655
T3 - Proceedings - International SoC Design Conference 2017, ISOCC 2017
SP - 152
EP - 154
BT - Proceedings - International SoC Design Conference 2017, ISOCC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 14th International SoC Design Conference, ISOCC 2017
Y2 - 5 November 2017 through 8 November 2017
ER -