TY - JOUR
T1 - Capacitor-shunted transmitter for power reduction in inductive-coupling clock link
AU - Kumar, Amit
AU - Miura, Noriyuki
AU - Kuroda, Tadahiro
PY - 2008/4/25
Y1 - 2008/4/25
N2 - The importance of low-power and high-speed chip-to-chip communication between stacked chips is increasing in system in a package (SiP) systems. Wireless chip-to-chip communication is a promising technology that can increase the speed of interchip data transfer with very little area and power overhead. The wireless clock link in this scheme consumes more power than wireless data circuits. To reduce the overall power consumption we need to reduce the power consumed in the clock link of the circuit. In this paper we present a simple yet effective transmitter circuit, namely a capacitor-shunted transmitter, to reduce the power consumed in the clock transmitter. The simulation is carried out in spectre, and, to confirm the simulation result, a test chip is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18μm complementary metal-oxide-semiconductor (CMOS). The simulation results and the test chip measurement results show that the power consumption of the clock transmitter circuit is reduced by 50% because of the capacitor-shunted transmitter circuit.
AB - The importance of low-power and high-speed chip-to-chip communication between stacked chips is increasing in system in a package (SiP) systems. Wireless chip-to-chip communication is a promising technology that can increase the speed of interchip data transfer with very little area and power overhead. The wireless clock link in this scheme consumes more power than wireless data circuits. To reduce the overall power consumption we need to reduce the power consumed in the clock link of the circuit. In this paper we present a simple yet effective transmitter circuit, namely a capacitor-shunted transmitter, to reduce the power consumed in the clock transmitter. The simulation is carried out in spectre, and, to confirm the simulation result, a test chip is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18μm complementary metal-oxide-semiconductor (CMOS). The simulation results and the test chip measurement results show that the power consumption of the clock transmitter circuit is reduced by 50% because of the capacitor-shunted transmitter circuit.
KW - Inductive coupling
KW - Inter chip communication
KW - Low power
KW - SiP
KW - Stacked chip
KW - Wireless
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U2 - 10.1143/JJAP.47.2749
DO - 10.1143/JJAP.47.2749
M3 - Article
AN - SCOPUS:54249111445
VL - 47
SP - 2749
EP - 2751
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
SN - 0021-4922
IS - 4 PART 2
ER -