Capacitor-shunted transmitter for power reduction in inductive-coupling clock link

Amit Kumar, Noriyuki Miura, Tadahiro Kuroda

    Research output: Contribution to journalArticle

    1 Citation (Scopus)

    Abstract

    The importance of low-power and high-speed chip-to-chip communication between stacked chips is increasing in system in a package (SiP) systems. Wireless chip-to-chip communication is a promising technology that can increase the speed of interchip data transfer with very little area and power overhead. The wireless clock link in this scheme consumes more power than wireless data circuits. To reduce the overall power consumption we need to reduce the power consumed in the clock link of the circuit. In this paper we present a simple yet effective transmitter circuit, namely a capacitor-shunted transmitter, to reduce the power consumed in the clock transmitter. The simulation is carried out in spectre, and, to confirm the simulation result, a test chip is fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18μm complementary metal-oxide-semiconductor (CMOS). The simulation results and the test chip measurement results show that the power consumption of the clock transmitter circuit is reduced by 50% because of the capacitor-shunted transmitter circuit.

    Original languageEnglish
    Pages (from-to)2749-2751
    Number of pages3
    JournalJapanese journal of applied physics
    Volume47
    Issue number4 PART 2
    DOIs
    Publication statusPublished - 2008 Apr 25

    Keywords

    • Inductive coupling
    • Inter chip communication
    • Low power
    • SiP
    • Stacked chip
    • Wireless

    ASJC Scopus subject areas

    • Engineering(all)
    • Physics and Astronomy(all)

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