Challenge and prospects for silicon SET/FET hybrid circuits

A. Toriumi, Ken Uchida, R. Ohba, J. Koga

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

Si SET devices are discussed from the viewpoint of suitability for CMOS technology. Since there are limitations in the application of devices with a low driving performance and no gain in the conventional circuit scheme, it is a challenge to implement their advantages into a chip for better performance as a total system. We propose a quantum function-embedded CMOS structure that should be open for the implementation of new devices. A key point is a graceful assimilation, since a sudden change in the architecture is not a solution at present. Although Si device/process technology will certainly be developed further, continuing investigation of the SET technology is necessary, if the CMOS technology is to extend into the 21st century, down to the sub-50 nm level.

Original languageEnglish
Pages (from-to)522-526
Number of pages5
JournalPhysica B: Condensed Matter
Volume272
Issue number1-4
DOIs
Publication statusPublished - 1999 Dec 1
Externally publishedYes

Fingerprint

hybrid circuits
Silicon
Field effect transistors
field effect transistors
CMOS
Networks (circuits)
silicon
assimilation
chips

ASJC Scopus subject areas

  • Materials Science(all)
  • Condensed Matter Physics

Cite this

Challenge and prospects for silicon SET/FET hybrid circuits. / Toriumi, A.; Uchida, Ken; Ohba, R.; Koga, J.

In: Physica B: Condensed Matter, Vol. 272, No. 1-4, 01.12.1999, p. 522-526.

Research output: Contribution to journalArticle

Toriumi, A. ; Uchida, Ken ; Ohba, R. ; Koga, J. / Challenge and prospects for silicon SET/FET hybrid circuits. In: Physica B: Condensed Matter. 1999 ; Vol. 272, No. 1-4. pp. 522-526.
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