TY - JOUR
T1 - Challenge and prospects for silicon SET/FET hybrid circuits
AU - Toriumi, A.
AU - Uchida, K.
AU - Ohba, R.
AU - Koga, J.
N1 - Funding Information:
The authors are grateful to Dr. A. Ohata in Riken for her contribution to the first stage of this project. They would like to thank Drs. S. Takagi and N. Sugiyama for helpful discussion and support. This work was partly under the management of FED as a part of the MITI R & D program (Quantum Functional Device Project) supported by NEDO.
PY - 1999/12/1
Y1 - 1999/12/1
N2 - Si SET devices are discussed from the viewpoint of suitability for CMOS technology. Since there are limitations in the application of devices with a low driving performance and no gain in the conventional circuit scheme, it is a challenge to implement their advantages into a chip for better performance as a total system. We propose a quantum function-embedded CMOS structure that should be open for the implementation of new devices. A key point is a graceful assimilation, since a sudden change in the architecture is not a solution at present. Although Si device/process technology will certainly be developed further, continuing investigation of the SET technology is necessary, if the CMOS technology is to extend into the 21st century, down to the sub-50 nm level.
AB - Si SET devices are discussed from the viewpoint of suitability for CMOS technology. Since there are limitations in the application of devices with a low driving performance and no gain in the conventional circuit scheme, it is a challenge to implement their advantages into a chip for better performance as a total system. We propose a quantum function-embedded CMOS structure that should be open for the implementation of new devices. A key point is a graceful assimilation, since a sudden change in the architecture is not a solution at present. Although Si device/process technology will certainly be developed further, continuing investigation of the SET technology is necessary, if the CMOS technology is to extend into the 21st century, down to the sub-50 nm level.
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U2 - 10.1016/S0921-4526(99)00392-0
DO - 10.1016/S0921-4526(99)00392-0
M3 - Conference article
AN - SCOPUS:0033320539
SN - 0921-4526
VL - 272
SP - 522
EP - 526
JO - Physica B: Condensed Matter
JF - Physica B: Condensed Matter
IS - 1-4
T2 - Proceedings of the 1999 11th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors (HCIS-11)
Y2 - 19 July 1999 through 23 July 1999
ER -