Comparison of thermal stress concentration and profile between power cycling test and thermal cycling test for power device heat dissipation structures using Ag sintering chip-attachment

Kensuke Osonoe, Takahiro Asai, Masaaki Aoki, Hitoshi Kida, Nobuhiko Nakano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Power semiconductor device technology needs highly efficient heat dissipation system having a chip bonding layer with high thermal conductance and reliability. This work clarifies 3D thermal stress profiles under power cycling test (PCT) and thermal cycling test (TCT) with multi-physics solver for the system having Ag sintered bonding layer as a new chip attachment technology. Both reliability test results on Von Mises stress profile are compared and the key features for each test are made clear. It was found that the maximum stress values within Si chip and Ag sintered bonding layer are at the corner of bonding layer for both PCT and TCT. The maximum stress of bonding layer under PCT ON state at chip power of 400 W is lower than the value under TCT with Ta of 25 °C which is the Ta of PCT. Under PCT the temperature difference from stress free temperature (Tr) for bonding layer is smaller than that under TCT with Ta of 25 °C, and this results in lower thermal stress in bonding layer. The maximum stress value of Ag sintered layer is a little lower than the conventional solder value under both PCT and TCT. This smaller stress of Ag sintered layer is thought to be due to lower Young's modulus of the Ag sintered layer.

Original languageEnglish
Title of host publication2016 International Conference on Electronics Packaging, ICEP 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages631-634
Number of pages4
ISBN (Electronic)9784904090176
DOIs
Publication statusPublished - 2016 Jun 7
Event2016 International Conference on Electronics Packaging, ICEP 2016 - Hokkaido, Japan
Duration: 2016 Apr 202016 Apr 22

Other

Other2016 International Conference on Electronics Packaging, ICEP 2016
CountryJapan
CityHokkaido
Period16/4/2016/4/22

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Keywords

  • Ag sintering
  • Chip attachment
  • Multi-physics solver
  • Power cycling test
  • Stress and strain analysis
  • Thermal cycling test

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering
  • Mechanics of Materials

Cite this

Osonoe, K., Asai, T., Aoki, M., Kida, H., & Nakano, N. (2016). Comparison of thermal stress concentration and profile between power cycling test and thermal cycling test for power device heat dissipation structures using Ag sintering chip-attachment. In 2016 International Conference on Electronics Packaging, ICEP 2016 (pp. 631-634). [7486906] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICEP.2016.7486906