Dependable Responsive Multithreaded Processor for distributed real-time systems

Kazutoshi Suito; Kei Fujii; Hiroki Matsutani; Nobuyuki Yamasaki

doi:10.1109/COOLChips.2012.6216589

Dependable Responsive Multithreaded Processor for distributed real-time systems

Kazutoshi Suito, Kei Fujii, Hiroki Matsutani, Nobuyuki Yamasaki

Department of Information and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

In this paper, we describe design and implementation of the Dependable Responsive Multithreaded Processor (D-RMTP) SoC (System-on-a-Chip) and SiP (System-in-a-Package). The D-RMTP SoC provides almost all functions required for the humanoid robots, including a real-time processing unit, a real-time inter-node communication link with error correction, and various I/O peripherals. The D-RMTP SoC is implemented in a 10m×10mm chip with a TSMC 130nm process technology. The D-RMTP SiP implemented in a 30mm×30mm board integrates the D-RMTP SoC, DDR-SDRAM, flash memory, power supply circuit, and temperature and voltage sensors for reliable DVFS.

Original language	English
Title of host publication	Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV
DOIs	https://doi.org/10.1109/COOLChips.2012.6216589
Publication status	Published - 2012 Jul 25
Event	15th IEEE Symposium on Low-Powerand High-Speed Chips, COOL Chips XV - Yokohama, Japan Duration: 2012 Apr 18 → 2012 Apr 20

Publication series

Name	Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV

Other

Other	15th IEEE Symposium on Low-Powerand High-Speed Chips, COOL Chips XV
Country/Territory	Japan
City	Yokohama
Period	12/4/18 → 12/4/20

Keywords

DVFS
RMT Processor
Responsive Link
SiP
SoC
dependability
distributed control
real-time

ASJC Scopus subject areas

Computer Networks and Communications

Access to Document

10.1109/COOLChips.2012.6216589

Cite this

Suito, K., Fujii, K., Matsutani, H., & Yamasaki, N. (2012). Dependable Responsive Multithreaded Processor for distributed real-time systems. In Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV [6216589] (Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV). https://doi.org/10.1109/COOLChips.2012.6216589

Dependable Responsive Multithreaded Processor for distributed real-time systems. / Suito, Kazutoshi; Fujii, Kei; Matsutani, Hiroki et al.

Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV. 2012. 6216589 (Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Suito, K, Fujii, K, Matsutani, H & Yamasaki, N 2012, Dependable Responsive Multithreaded Processor for distributed real-time systems. in Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV., 6216589, Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV, 15th IEEE Symposium on Low-Powerand High-Speed Chips, COOL Chips XV, Yokohama, Japan, 12/4/18. https://doi.org/10.1109/COOLChips.2012.6216589

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abstract = "In this paper, we describe design and implementation of the Dependable Responsive Multithreaded Processor (D-RMTP) SoC (System-on-a-Chip) and SiP (System-in-a-Package). The D-RMTP SoC provides almost all functions required for the humanoid robots, including a real-time processing unit, a real-time inter-node communication link with error correction, and various I/O peripherals. The D-RMTP SoC is implemented in a 10m×10mm chip with a TSMC 130nm process technology. The D-RMTP SiP implemented in a 30mm×30mm board integrates the D-RMTP SoC, DDR-SDRAM, flash memory, power supply circuit, and temperature and voltage sensors for reliable DVFS.",

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author = "Kazutoshi Suito and Kei Fujii and Hiroki Matsutani and Nobuyuki Yamasaki",

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Dependable Responsive Multithreaded Processor for distributed real-time systems

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Keywords

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