TY - GEN
T1 - Dependable Responsive Multithreaded Processor for distributed real-time systems
AU - Suito, Kazutoshi
AU - Fujii, Kei
AU - Matsutani, Hiroki
AU - Yamasaki, Nobuyuki
PY - 2012/7/25
Y1 - 2012/7/25
N2 - In this paper, we describe design and implementation of the Dependable Responsive Multithreaded Processor (D-RMTP) SoC (System-on-a-Chip) and SiP (System-in-a-Package). The D-RMTP SoC provides almost all functions required for the humanoid robots, including a real-time processing unit, a real-time inter-node communication link with error correction, and various I/O peripherals. The D-RMTP SoC is implemented in a 10m×10mm chip with a TSMC 130nm process technology. The D-RMTP SiP implemented in a 30mm×30mm board integrates the D-RMTP SoC, DDR-SDRAM, flash memory, power supply circuit, and temperature and voltage sensors for reliable DVFS.
AB - In this paper, we describe design and implementation of the Dependable Responsive Multithreaded Processor (D-RMTP) SoC (System-on-a-Chip) and SiP (System-in-a-Package). The D-RMTP SoC provides almost all functions required for the humanoid robots, including a real-time processing unit, a real-time inter-node communication link with error correction, and various I/O peripherals. The D-RMTP SoC is implemented in a 10m×10mm chip with a TSMC 130nm process technology. The D-RMTP SiP implemented in a 30mm×30mm board integrates the D-RMTP SoC, DDR-SDRAM, flash memory, power supply circuit, and temperature and voltage sensors for reliable DVFS.
KW - DVFS
KW - RMT Processor
KW - Responsive Link
KW - SiP
KW - SoC
KW - dependability
KW - distributed control
KW - real-time
UR - http://www.scopus.com/inward/record.url?scp=84864070841&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84864070841&partnerID=8YFLogxK
U2 - 10.1109/COOLChips.2012.6216589
DO - 10.1109/COOLChips.2012.6216589
M3 - Conference contribution
AN - SCOPUS:84864070841
SN - 9781467312028
T3 - Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV
BT - Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV
T2 - 15th IEEE Symposium on Low-Powerand High-Speed Chips, COOL Chips XV
Y2 - 18 April 2012 through 20 April 2012
ER -