Design and analysis for ThruChip design for manufacturing (DFM)

Li Chung Hsu, Yasuhiro Take, Atsutake Kosuge, So Hasegawa, Junichiro Kadamoto, Tadahiro Kuroda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

A 1GB/s ThruChip interface (TCI) test chip for wafer thinning, power mesh, and dummy metal fill impacts are analyzed and evaluated with test chip measurement and field solver simulation. The measurement results show that TCI coil dimension can be sized down as wafer thinning by following D/Z=3 rule. However, the experiment shows 20% power reduction by enlarging TCI coil (D/Z=6). The power mesh lies between TCI coils can dramatically decrease the TCI magnetic pulse strength and hence cause TCI to fail. Dummy metal within TCI coils has no impact on TCI transmission

Original languageEnglish
Title of host publication20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages46-47
Number of pages2
ISBN (Print)9781479977925
DOIs
Publication statusPublished - 2015 Mar 11
Event2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 - Chiba, Japan
Duration: 2015 Jan 192015 Jan 22

Other

Other2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015
CountryJapan
CityChiba
Period15/1/1915/1/22

Fingerprint

Design for Manufacturing
Coil
Metals
Thinning
Wafer
Chip
Experiments
Mesh
Design
Decrease

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering
  • Control and Systems Engineering
  • Modelling and Simulation

Cite this

Hsu, L. C., Take, Y., Kosuge, A., Hasegawa, S., Kadamoto, J., & Kuroda, T. (2015). Design and analysis for ThruChip design for manufacturing (DFM). In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 (pp. 46-47). [7058979] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2015.7058979

Design and analysis for ThruChip design for manufacturing (DFM). / Hsu, Li Chung; Take, Yasuhiro; Kosuge, Atsutake; Hasegawa, So; Kadamoto, Junichiro; Kuroda, Tadahiro.

20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 46-47 7058979.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hsu, LC, Take, Y, Kosuge, A, Hasegawa, S, Kadamoto, J & Kuroda, T 2015, Design and analysis for ThruChip design for manufacturing (DFM). in 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015., 7058979, Institute of Electrical and Electronics Engineers Inc., pp. 46-47, 2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, 15/1/19. https://doi.org/10.1109/ASPDAC.2015.7058979
Hsu LC, Take Y, Kosuge A, Hasegawa S, Kadamoto J, Kuroda T. Design and analysis for ThruChip design for manufacturing (DFM). In 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 46-47. 7058979 https://doi.org/10.1109/ASPDAC.2015.7058979
Hsu, Li Chung ; Take, Yasuhiro ; Kosuge, Atsutake ; Hasegawa, So ; Kadamoto, Junichiro ; Kuroda, Tadahiro. / Design and analysis for ThruChip design for manufacturing (DFM). 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 46-47
@inproceedings{187b3957363f4b9d8d5bf3a8ed0975c7,
title = "Design and analysis for ThruChip design for manufacturing (DFM)",
abstract = "A 1GB/s ThruChip interface (TCI) test chip for wafer thinning, power mesh, and dummy metal fill impacts are analyzed and evaluated with test chip measurement and field solver simulation. The measurement results show that TCI coil dimension can be sized down as wafer thinning by following D/Z=3 rule. However, the experiment shows 20{\%} power reduction by enlarging TCI coil (D/Z=6). The power mesh lies between TCI coils can dramatically decrease the TCI magnetic pulse strength and hence cause TCI to fail. Dummy metal within TCI coils has no impact on TCI transmission",
author = "Hsu, {Li Chung} and Yasuhiro Take and Atsutake Kosuge and So Hasegawa and Junichiro Kadamoto and Tadahiro Kuroda",
year = "2015",
month = "3",
day = "11",
doi = "10.1109/ASPDAC.2015.7058979",
language = "English",
isbn = "9781479977925",
pages = "46--47",
booktitle = "20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Design and analysis for ThruChip design for manufacturing (DFM)

AU - Hsu, Li Chung

AU - Take, Yasuhiro

AU - Kosuge, Atsutake

AU - Hasegawa, So

AU - Kadamoto, Junichiro

AU - Kuroda, Tadahiro

PY - 2015/3/11

Y1 - 2015/3/11

N2 - A 1GB/s ThruChip interface (TCI) test chip for wafer thinning, power mesh, and dummy metal fill impacts are analyzed and evaluated with test chip measurement and field solver simulation. The measurement results show that TCI coil dimension can be sized down as wafer thinning by following D/Z=3 rule. However, the experiment shows 20% power reduction by enlarging TCI coil (D/Z=6). The power mesh lies between TCI coils can dramatically decrease the TCI magnetic pulse strength and hence cause TCI to fail. Dummy metal within TCI coils has no impact on TCI transmission

AB - A 1GB/s ThruChip interface (TCI) test chip for wafer thinning, power mesh, and dummy metal fill impacts are analyzed and evaluated with test chip measurement and field solver simulation. The measurement results show that TCI coil dimension can be sized down as wafer thinning by following D/Z=3 rule. However, the experiment shows 20% power reduction by enlarging TCI coil (D/Z=6). The power mesh lies between TCI coils can dramatically decrease the TCI magnetic pulse strength and hence cause TCI to fail. Dummy metal within TCI coils has no impact on TCI transmission

UR - http://www.scopus.com/inward/record.url?scp=84926459227&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84926459227&partnerID=8YFLogxK

U2 - 10.1109/ASPDAC.2015.7058979

DO - 10.1109/ASPDAC.2015.7058979

M3 - Conference contribution

AN - SCOPUS:84926459227

SN - 9781479977925

SP - 46

EP - 47

BT - 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015

PB - Institute of Electrical and Electronics Engineers Inc.

ER -