Design and Evaluation of a Switch Architecture for Multistage Interconnection Network with Temporary Directory

Masato Sumiyoshi, Yasuki Tanabe, Takashi Midorikawa, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Researches on Multistage Interconnection Network (MIN) with cache or cache directories inside the switching elements have been exerted for building cache coherent multiprocessors. We proposed MINDIC (MIN with Directory Cache switch), a novel MIN structure that consists of switching elements with small temporary directory. With the temporary directories built dynamically in each switching element, we can maintain cache consistency with low latency and low memory cost. Previously, three variations of MINDIC protocols were evaluated by trace level simulation. From the detailed evaluation of eviction protocol, it became clear that MINDIC is equivalent to the architecture with full-mapped directories in execution performance. Also, synthesis report using 0.18μm CMOS process shows that the hardware cost is small enough for implementation.

Original languageEnglish
Title of host publication17th ISCA International Conference on Parallel and Distributed Computing Systems 2004, PDCS 2004
EditorsDavid A. Bader, Ashfaq A. Khokhar
PublisherInternational Society for Computers and Their Applications (ISCA)
Pages296-301
Number of pages6
ISBN (Electronic)9781618398185
Publication statusPublished - 2004
Event17th International Conference on Parallel and Distributed Computing Systems, PDCS 2004 - San Francisco, United States
Duration: 2004 Sep 152004 Sep 17

Publication series

Name17th ISCA International Conference on Parallel and Distributed Computing Systems 2004, PDCS 2004

Conference

Conference17th International Conference on Parallel and Distributed Computing Systems, PDCS 2004
Country/TerritoryUnited States
CitySan Francisco
Period04/9/1504/9/17

Keywords

  • Multiprocessors
  • Multistage Interconnection Network
  • Temporary directory

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software
  • Computer Networks and Communications

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