Designing low-diameter interconnection networks with multi-ported host-switch graphs

Ryota Yasudo, Koji Nakano, Michihiro Koibuchi, Hiroki Matsutani, Hideharu Amano

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

A host-switch graph was originally proposed as a graph that represents a network topology of a computer systems with 1-port host computers and (Formula presented.) -port switches. It has been studied from both theoretical and practical aspects in terms of the diameter, the average shortest path length, and the performance of real applications. In recent high-performance computing systems, however, a host computer is connected to multiple switches by using InfiniBand, NVSwitch, or Omni-Path, and consequently they provide high bandwidths. Since a host-switch graph cannot represent such systems, this article extends a host-switch graph so that it can represent such systems. As a result, a host-switch graph can include multi-ported hosts. Furthermore, we propose to use multi-port hosts for reducing the diameter. We show that the diameter minimization is equivalent to solving the degree diameter problem for bipartite graphs of diameter three. Our experimental results show that we can drastically reduce the diameter as well as increasing the bandwidth and improves performance of MPI applications by up to 162% as compared with networks with single-ported hosts.

Original languageEnglish
JournalConcurrency Computation Practice and Experience
DOIs
Publication statusAccepted/In press - 2020

Keywords

  • bipartite graph
  • block design
  • graph theory
  • interconnection network
  • projective plane

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Computer Science Applications
  • Computer Networks and Communications
  • Computational Theory and Mathematics

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