TY - GEN
T1 - Distance Aware Compression for Low Latency High Bandwidth Interconnection Network
AU - Yuqing, Zhou
AU - Niwa, Naoya
AU - Amano, Hideharu
N1 - Funding Information:
This work was supported by JST CREST Grant Number JP-MJCR19K1, Japan. The design is supported by VLSI Design and Education Center(VDEC), the University of Tokyo in collaboration with Synopsys, Inc and Cadence Design Systems, Inc.
Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - NoC(Network-on-Chip)s is an essential component of recent multi-core systems. When the number of wires available on a chip is limited, it is sometimes congested and increased la-tency can degrade the parallel application performance. The selective data compression has been proposed to mitigate such network congestion by compressing and decompressing packets based on the packet length and traffic situation. However, since the algorithm does not care the location of nodes, the compression and decompression are performed even when the packet is transferred between neighboring nodes. This paper proposes a distance aware (DA) compression mechanism to select whether the packet should be compressed by the distance to the destination. The packets to the nodes whose distance is larger than threshold level are compressed with a run-length loss-less compression at the sender's network interface and de-compressed at the receiver's network interface. Cycle level network simulation results show that the selective compression method achieves up to 45% bandwidth improve-ment with 1.26 times increase of the latency.
AB - NoC(Network-on-Chip)s is an essential component of recent multi-core systems. When the number of wires available on a chip is limited, it is sometimes congested and increased la-tency can degrade the parallel application performance. The selective data compression has been proposed to mitigate such network congestion by compressing and decompressing packets based on the packet length and traffic situation. However, since the algorithm does not care the location of nodes, the compression and decompression are performed even when the packet is transferred between neighboring nodes. This paper proposes a distance aware (DA) compression mechanism to select whether the packet should be compressed by the distance to the destination. The packets to the nodes whose distance is larger than threshold level are compressed with a run-length loss-less compression at the sender's network interface and de-compressed at the receiver's network interface. Cycle level network simulation results show that the selective compression method achieves up to 45% bandwidth improve-ment with 1.26 times increase of the latency.
KW - data compression
KW - distance aware compression
KW - interconnection network
UR - http://www.scopus.com/inward/record.url?scp=85147454576&partnerID=8YFLogxK
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U2 - 10.1109/MCSoC57363.2022.00063
DO - 10.1109/MCSoC57363.2022.00063
M3 - Conference contribution
AN - SCOPUS:85147454576
T3 - Proceedings - 2022 IEEE 15th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022
SP - 361
EP - 367
BT - Proceedings - 2022 IEEE 15th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 15th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2022
Y2 - 19 December 2022 through 22 December 2022
ER -