@inproceedings{7b969532dab34544abff9e9814b968b0,
title = "Dynamic deficit round-robin scheduler for 5-Tb/s switch using wavelength routing",
abstract = "A dynamic deficit round-robin (DDRR) scheduling scheme for a 5-Tb/s switch is proposed. DDRR is a DRR-based packet scheduler and it can satisfy the max-min fair share. However, DRR cannot satisfy both high throughput and delay requirements. DDRR resolves the problem by changing the granularity for deficit counters according to the packet lengths at queue heads. Simulation results showing the efficiency of DDRR are presented and an implementation of DDRR for the switch is also described.",
keywords = "DRR, deficit, delay, packet, scheduler, switch",
author = "K. Yamakoshi and E. Oki and N. Yamanaka",
year = "2002",
month = jan,
day = "1",
doi = "10.1109/HPSR.2002.1024236",
language = "English",
isbn = "488552184X",
series = "IEEE International Conference on High Performance Switching and Routing, HPSR",
publisher = "IEEE Computer Society",
pages = "204--208",
booktitle = "HPSR 2002 - Workshop on High Performance Switching and Routing",
note = "2002 Workshop on High Performance Switching and Routing: Merging Optical and IP Technologies, HPSR 2002 ; Conference date: 26-05-2002 Through 29-05-2002",
}