Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links

Hao Zhang, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Network-on-Chips (NoCs) with wireless inductive coupling have been utilized in real heterogeneous multicore systems. Although the inductive-coupling itself is energy-efficient (e.g., 0.14pJ per bit [1]), inductors continuously consume a certain amount of power, regardless of packet transfers. That is, inductors waste significant power especially when the utilization of vertical links (i.e., inductors) is low, which is a typical use case of 3-D ICs that the most communications are within a chip while the communications between chips are infrequent. Such power can be reduced by shutting down the link by controlling bias voltage of transistors used in the transmitter and receiver. Here, we propose generalized link on-off techniques for wireless NoCs with irregular network topologies. The simulation shows that the proposed low-power techniques reduce the power consumption by 43.8%-55.0%.

Original languageEnglish
Title of host publicationIEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI
DOIs
Publication statusPublished - 2013
Event16th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2013 - Yokohama, Japan
Duration: 2013 Apr 172013 Apr 19

Other

Other16th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2013
CountryJapan
CityYokohama
Period13/4/1713/4/19

Fingerprint

Telecommunication links
Communication
Bias voltage
Transmitters
Wireless networks
Transistors
Electric power utilization
Topology
Network-on-chip

Keywords

  • Wireless NoC and On/Off link

ASJC Scopus subject areas

  • Hardware and Architecture

Cite this

Zhang, H., Matsutani, H., Koibuchi, M., & Amano, H. (2013). Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links. In IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI [6547924] https://doi.org/10.1109/CoolChips.2013.6547924

Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links. / Zhang, Hao; Matsutani, Hiroki; Koibuchi, Michihiro; Amano, Hideharu.

IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 2013. 6547924.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zhang, H, Matsutani, H, Koibuchi, M & Amano, H 2013, Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links. in IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI., 6547924, 16th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2013, Yokohama, Japan, 13/4/17. https://doi.org/10.1109/CoolChips.2013.6547924
Zhang H, Matsutani H, Koibuchi M, Amano H. Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links. In IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 2013. 6547924 https://doi.org/10.1109/CoolChips.2013.6547924
Zhang, Hao ; Matsutani, Hiroki ; Koibuchi, Michihiro ; Amano, Hideharu. / Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links. IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 2013.
@inproceedings{76fd6c5126e346cab291e3ea6087cf7b,
title = "Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links",
abstract = "Network-on-Chips (NoCs) with wireless inductive coupling have been utilized in real heterogeneous multicore systems. Although the inductive-coupling itself is energy-efficient (e.g., 0.14pJ per bit [1]), inductors continuously consume a certain amount of power, regardless of packet transfers. That is, inductors waste significant power especially when the utilization of vertical links (i.e., inductors) is low, which is a typical use case of 3-D ICs that the most communications are within a chip while the communications between chips are infrequent. Such power can be reduced by shutting down the link by controlling bias voltage of transistors used in the transmitter and receiver. Here, we propose generalized link on-off techniques for wireless NoCs with irregular network topologies. The simulation shows that the proposed low-power techniques reduce the power consumption by 43.8{\%}-55.0{\%}.",
keywords = "Wireless NoC and On/Off link",
author = "Hao Zhang and Hiroki Matsutani and Michihiro Koibuchi and Hideharu Amano",
year = "2013",
doi = "10.1109/CoolChips.2013.6547924",
language = "English",
isbn = "9781467357814",
booktitle = "IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI",

}

TY - GEN

T1 - Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links

AU - Zhang, Hao

AU - Matsutani, Hiroki

AU - Koibuchi, Michihiro

AU - Amano, Hideharu

PY - 2013

Y1 - 2013

N2 - Network-on-Chips (NoCs) with wireless inductive coupling have been utilized in real heterogeneous multicore systems. Although the inductive-coupling itself is energy-efficient (e.g., 0.14pJ per bit [1]), inductors continuously consume a certain amount of power, regardless of packet transfers. That is, inductors waste significant power especially when the utilization of vertical links (i.e., inductors) is low, which is a typical use case of 3-D ICs that the most communications are within a chip while the communications between chips are infrequent. Such power can be reduced by shutting down the link by controlling bias voltage of transistors used in the transmitter and receiver. Here, we propose generalized link on-off techniques for wireless NoCs with irregular network topologies. The simulation shows that the proposed low-power techniques reduce the power consumption by 43.8%-55.0%.

AB - Network-on-Chips (NoCs) with wireless inductive coupling have been utilized in real heterogeneous multicore systems. Although the inductive-coupling itself is energy-efficient (e.g., 0.14pJ per bit [1]), inductors continuously consume a certain amount of power, regardless of packet transfers. That is, inductors waste significant power especially when the utilization of vertical links (i.e., inductors) is low, which is a typical use case of 3-D ICs that the most communications are within a chip while the communications between chips are infrequent. Such power can be reduced by shutting down the link by controlling bias voltage of transistors used in the transmitter and receiver. Here, we propose generalized link on-off techniques for wireless NoCs with irregular network topologies. The simulation shows that the proposed low-power techniques reduce the power consumption by 43.8%-55.0%.

KW - Wireless NoC and On/Off link

UR - http://www.scopus.com/inward/record.url?scp=84881322790&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84881322790&partnerID=8YFLogxK

U2 - 10.1109/CoolChips.2013.6547924

DO - 10.1109/CoolChips.2013.6547924

M3 - Conference contribution

SN - 9781467357814

BT - IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI

ER -