Abstract
We have demonstrated the effects of interface traps and defects on the charge retention characteristics in silicon-quantum-dot (Si-QDs)-based metal-oxide-semiconductor (MOS) memory structures. MOS diodes with various interface traps and defects introduced by thermal annealing treatment are investigated using a capacitance-voltage (C-V) measurement technique. The model of deep trapping centers including three-dimensional quantum confinement and Coulomb charge effects has been developed to successfully explain the observed long-term charge retention behaviors.
| Original language | English |
|---|---|
| Pages (from-to) | 425-428 |
| Number of pages | 4 |
| Journal | Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers |
| Volume | 38 |
| Issue number | 1 B |
| Publication status | Published - 1999 |
| Externally published | Yes |
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Keywords
- Defect
- Interface trap
- MOS memory
- Silicon quantum dot
ASJC Scopus subject areas
- Physics and Astronomy (miscellaneous)
- Engineering(all)
Cite this
Effects of Interface Traps on Charge Retention Characteristics in Silicon-Quantum-Dot-Based Metal-Oxide-Semiconductor Diodes. / Shi, Yi; Saito, Kenichi; Ishikuro, Hiroki; Hiramoto, Toshiro.
In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, Vol. 38, No. 1 B, 1999, p. 425-428.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Effects of Interface Traps on Charge Retention Characteristics in Silicon-Quantum-Dot-Based Metal-Oxide-Semiconductor Diodes
AU - Shi, Yi
AU - Saito, Kenichi
AU - Ishikuro, Hiroki
AU - Hiramoto, Toshiro
PY - 1999
Y1 - 1999
N2 - We have demonstrated the effects of interface traps and defects on the charge retention characteristics in silicon-quantum-dot (Si-QDs)-based metal-oxide-semiconductor (MOS) memory structures. MOS diodes with various interface traps and defects introduced by thermal annealing treatment are investigated using a capacitance-voltage (C-V) measurement technique. The model of deep trapping centers including three-dimensional quantum confinement and Coulomb charge effects has been developed to successfully explain the observed long-term charge retention behaviors.
AB - We have demonstrated the effects of interface traps and defects on the charge retention characteristics in silicon-quantum-dot (Si-QDs)-based metal-oxide-semiconductor (MOS) memory structures. MOS diodes with various interface traps and defects introduced by thermal annealing treatment are investigated using a capacitance-voltage (C-V) measurement technique. The model of deep trapping centers including three-dimensional quantum confinement and Coulomb charge effects has been developed to successfully explain the observed long-term charge retention behaviors.
KW - Defect
KW - Interface trap
KW - MOS memory
KW - Silicon quantum dot
UR - http://www.scopus.com/inward/record.url?scp=0032621326&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0032621326&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:0032621326
VL - 38
SP - 425
EP - 428
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
SN - 0021-4922
IS - 1 B
ER -