Electron transport in surface oxidized Si nanocrystal ensembles with thin film transistor structure

Electron transport in the surface oxidized Si nanocrystals ensembles is described based on electrical measurements of thin film transistor structures as functions of temperature and voltage. Contact resistance has been greatly reduced by using a heavily doped silicon-on-insulator layer as electrodes, compared with devices based on Al/SiNCs/Al structures. Traps with the activation energy of 147 and 103 meV have been found when SiNC channels are applied with high gate voltage. The mechanism that these two traps successively dominate the Poole-Frenkel type conduction in low and high drain-source voltage region is discussed based on an assumption that the density of these two traps is different. Trapped carriers' effects on the electric field distribution are believed to be responsible for the difference of the G- V_ds ^1/2 slopes in the different drain-sources regions, which is in accord with the experimental results of the hydrogen annealing treatment. The carrier mobility is also discussed based on the measurement of gate voltage dependence of the drain-source current.