Empirical study for optimization of power-performance with on-chip memory

Chikafumi Takahashi, Mitsuhisa Sato, Daisuke Takahashi, Taisuke Boku, Hiroshi Nakamura, Masaaki Kondo, Motonobu Fujita

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Power-performance (performance per uniform power consumption) recently has become a more important factor in modern high-performance microprocessors. In processor design, it is a well-known that off-chip memory access has a large impact on both performance and power consumption. On-chip memory is one solution for this problem, so that many processors such as the Renesas SH-4 and some ARM architecture type processors adopt on-chip memory, which resides on the same layer as the cache memory. In this study, the effectiveness of the on-chip memory in an SH-4 processor was quantitatively examined by directly measuring the real power of the processor. For these experiments, we proposed a method that made use of the on-chip memory for power reduction. The experimental results show that the optimization of data transfer using on-chip memory reduces EDP(energy delay product) by up to 15.2%. As an extension of on-chip memory, we have proposed an on-chip RAM architecture called SCIMA (software controllable integrated memory architecture) which enables DMA (direct memory access) transfer to the on-chip memory. According to the empirical data from the SH-4 processor, it was found that the additional DMA transfer using SCIMA reduces EDP by up to 26.3%.

Original languageEnglish
Title of host publicationHigh-Performance Computing - 6th International Symposium, ISHPC 2005 and First International Workshop on Advanced Low Power Systems, ALPS 2006, Revised Selected Papers
PublisherSpringer Verlag
Pages466-479
Number of pages14
ISBN (Print)3540777032, 9783540777038
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event6th International Symposium on High Performance Computing, ISHPC 2005 and 1st International Workshop on Advanced Low Power Systems, ALPS 2006 - Nara, Japan
Duration: 2005 Sep 72005 Sep 9

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume4759 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other6th International Symposium on High Performance Computing, ISHPC 2005 and 1st International Workshop on Advanced Low Power Systems, ALPS 2006
Country/TerritoryJapan
CityNara
Period05/9/705/9/9

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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