Enforcing dimension-order routing in on-chip torus networks without virtual channels

Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In the case of simple tile-based architecture, such as small reconfigurable processor arrays, a virtual-channel mechanism, which requires additional logic and pipeline stages, will be one of the crucial factors for a low cost implementation of their on-chip routers. To guarantee deadlock-free packet transfer with no virtual channels on tori, we propose a non-minimal strategy consistent with the rule of dimension-order routing (DOR) algorithm. Since embedded streaming applications usually generate predictable data traffic, the path set can be customized to the traffic from alternative DOR paths. Although the proposed strategy does not use any virtual channels, it achieves almost the same performance as virtual-channel routers on tori in eleven of 18 application traces.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
PublisherSpringer Verlag
Pages207-218
Number of pages12
Volume4330
ISBN (Print)9783540680673
Publication statusPublished - 2006
Event4th International Symposium on Parallel and Distributed Processing and Applications, ISPA 2006 - Sorrento, Italy
Duration: 2006 Dec 42006 Dec 6

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume4330
ISSN (Print)03029743
ISSN (Electronic)16113349

Other

Other4th International Symposium on Parallel and Distributed Processing and Applications, ISPA 2006
CountryItaly
CitySorrento
Period06/12/406/12/6

Fingerprint

Order Dimension
Virtual Channel
Routers
Torus
Routing
Chip
Routing algorithms
Parallel processing systems
Tile
Router
Pipelines
Traffic
Path
Deadlock
Routing Algorithm
Streaming
Costs
Trace
Logic
Network-on-chip

ASJC Scopus subject areas

  • Computer Science(all)
  • Theoretical Computer Science

Cite this

Matsutani, H., Koibuchi, M., & Amano, H. (2006). Enforcing dimension-order routing in on-chip torus networks without virtual channels. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4330, pp. 207-218). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 4330). Springer Verlag.

Enforcing dimension-order routing in on-chip torus networks without virtual channels. / Matsutani, Hiroki; Koibuchi, Michihiro; Amano, Hideharu.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 4330 Springer Verlag, 2006. p. 207-218 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 4330).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Matsutani, H, Koibuchi, M & Amano, H 2006, Enforcing dimension-order routing in on-chip torus networks without virtual channels. in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). vol. 4330, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 4330, Springer Verlag, pp. 207-218, 4th International Symposium on Parallel and Distributed Processing and Applications, ISPA 2006, Sorrento, Italy, 06/12/4.
Matsutani H, Koibuchi M, Amano H. Enforcing dimension-order routing in on-chip torus networks without virtual channels. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 4330. Springer Verlag. 2006. p. 207-218. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).
Matsutani, Hiroki ; Koibuchi, Michihiro ; Amano, Hideharu. / Enforcing dimension-order routing in on-chip torus networks without virtual channels. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Vol. 4330 Springer Verlag, 2006. pp. 207-218 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).
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