Enhanced Drain Current in Transient Mode due to Long Ionization Time of Shallow Impurities at 4 K in 65-nm bulk Cryo CMOS Transistors

Tomohisa Miyao, Takahisa Tanaka, Itsuki Imanishi, Masayuki Ichikawa, Shuya Nakagawa, Hiroki Ishikuro, Toshitsugu Sakamoto, Munehiro Tada, Ken Uchida

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Despite the importance of cryo CMOS technologies in quantum computing systems, the transient behaviors of cryo MOS transistors have been less studied. In this work, in advanced CMOS transistors we observed sub-us transient drain current (IdTrans) that was much greater than the static drain current (IdStatic) at 4 K (Fig. 6); the transient-to-static ratio r=IdTrans/IdStatic reached as large as 2.7 (Fig. 9), whereas r stays at one in the same device at 20 K. The observed transient characteristics are not due to the self-heating effects, but due to the long emission time of holes from acceptors at 4 K. After applying biases, more electrons flow into the channel than those in static conditions to mitigate the frozen acceptors. IdTrans. goes down to IdStatic because of gradual ionization of acceptors. We consider that the observed transient behavior needs to be considered in cryo MOSFET model to accurately design cryo LSI circuits.

Original languageEnglish
Title of host publication2022 Device Research Conference, DRC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665498838
DOIs
Publication statusPublished - 2022
Event2022 Device Research Conference, DRC 2022 - Columbus, United States
Duration: 2022 Jun 262022 Jun 29

Publication series

NameDevice Research Conference - Conference Digest, DRC
Volume2022-June
ISSN (Print)1548-3770

Conference

Conference2022 Device Research Conference, DRC 2022
Country/TerritoryUnited States
CityColumbus
Period22/6/2622/6/29

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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