ESPRIT/sim: A high speed performance-simulator for heterogeneous embedded multiprocessors

Yasuhito Ohmiya, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A dynamic binary-translation accelerator employed by an execution-driven simulator "ESPRIT/sim", which mimics machine instructions and cache behavior of embedded multi-core systems, is proposed. Increasing number of multi-core in a chip, simulation of embedded system requires high performance. ESPRIT/sim minimizes dependency to simulated instruction set architectures and host instruction set architectures, and enlarges common parts of simulator to reduce developing costs of translators. ESPRIT/sim has flexible cache models written in C++, and dynamically translated execution code helps to reduce their overhead. Heterogeneous multiprocessors that become popular in embedded field can be simulated as well as homogeneous ones by using ESPRIT/sim. Here, we have evaluated SPLASH-2 simulation speed of multiprocessor systems up to 16 processors; then we have showed CPI as 6 through 10 for simulation and 11 through 23 for cache simulation. Similarly, ESPRIT/sim has simulated a heterogeneous multiprocessor system at high speed. For uni-processor systems, CINT95 programs have run from 2.6 to 9 CPI, and simulations with other statistics have been also boost up.

Original languageEnglish
Title of host publicationProceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems
Pages252-257
Number of pages6
Publication statusPublished - 2008
Event20th IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2008 - Orlando, FL, United States
Duration: 2008 Nov 162008 Nov 18

Other

Other20th IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2008
CountryUnited States
CityOrlando, FL
Period08/11/1608/11/18

Fingerprint

Simulators
Embedded systems
Particle accelerators
Statistics
Costs

Keywords

  • Binary translation
  • Cache simulation
  • Multiprocessor simulation

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computer Networks and Communications

Cite this

Ohmiya, Y., & Amano, H. (2008). ESPRIT/sim: A high speed performance-simulator for heterogeneous embedded multiprocessors. In Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems (pp. 252-257)

ESPRIT/sim : A high speed performance-simulator for heterogeneous embedded multiprocessors. / Ohmiya, Yasuhito; Amano, Hideharu.

Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems. 2008. p. 252-257.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ohmiya, Y & Amano, H 2008, ESPRIT/sim: A high speed performance-simulator for heterogeneous embedded multiprocessors. in Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems. pp. 252-257, 20th IASTED International Conference on Parallel and Distributed Computing and Systems, PDCS 2008, Orlando, FL, United States, 08/11/16.
Ohmiya Y, Amano H. ESPRIT/sim: A high speed performance-simulator for heterogeneous embedded multiprocessors. In Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems. 2008. p. 252-257
Ohmiya, Yasuhito ; Amano, Hideharu. / ESPRIT/sim : A high speed performance-simulator for heterogeneous embedded multiprocessors. Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems. 2008. pp. 252-257
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