TY - GEN
T1 - Evaluation of network interface controller on DIMMnet-2 prototype board
AU - Kitamura, Akira
AU - Hamada, Yoshihiro
AU - Miyabe, Yasuo
AU - Izawa, Tetsu
AU - Miyashiro, Tomotaka
AU - Watanabe, Konosuke
AU - Otsuka, Tomohiro
AU - Tanabe, Noboru
AU - Nakajo, Hironori
AU - Amano, Hideharu
PY - 2005/12/1
Y1 - 2005/12/1
N2 - By recent performance improvement of interconnection networks for a PC cluster, standard I/O bus which connects network interface becomes the performance bottleneck. DIMMnet is a network interface which can solve the problem by using the memory bus instead of PCI bus or other I/O buses. The second generation network interface DIMMnet-2 can be connected with DDR-SDRAM slot by using the indirect accessing to memory and buffers. Although the current board is a prototype using an FPGA, the latency for 8 Bytes data transfer is only 0.441μs.
AB - By recent performance improvement of interconnection networks for a PC cluster, standard I/O bus which connects network interface becomes the performance bottleneck. DIMMnet is a network interface which can solve the problem by using the memory bus instead of PCI bus or other I/O buses. The second generation network interface DIMMnet-2 can be connected with DDR-SDRAM slot by using the indirect accessing to memory and buffers. Although the current board is a prototype using an FPGA, the latency for 8 Bytes data transfer is only 0.441μs.
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U2 - 10.1109/PDCAT.2005.136
DO - 10.1109/PDCAT.2005.136
M3 - Conference contribution
AN - SCOPUS:33745147554
SN - 0769524052
SN - 9780769524054
T3 - Parallel and Distributed Computing, Applications and Technologies, PDCAT Proceedings
SP - 778
EP - 780
BT - Proceedings - Sixth International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2005
T2 - 6th International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2005
Y2 - 5 December 2005 through 8 December 2005
ER -