Fabrication and characterization of Si/SiGe quantum dots with capping gate

Tetsuo Kodera, Yuji Fukuoka, Kenta Takeda, Toshiaki Obata, Katsuharu Yoshida, Kentaro Sawano, Ken Uchida, Yasuhiro Shiraki, Seigo Tarucha, Shunri Oda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We study transport properties of quantum point contacts (QPCs) and quantum dots (QDs) with a global capping gate, fabricated on a Si/SiGe high electron mobility transistor (HEMT) wafer. By biasing the capping gate negatively, we succeed in making QPC operation point of surface Schottky gate negatively smaller and then reducing noise. We also observe Coulomb oscillations using a QD structure by suppressing charging noise with negative capping gate voltage.

Original languageEnglish
Title of host publication2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012
DOIs
Publication statusPublished - 2012 Oct 12
Event2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012 - Honolulu, HI, United States
Duration: 2012 Jun 102012 Jun 11

Publication series

Name2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012

Other

Other2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012
CountryUnited States
CityHonolulu, HI
Period12/6/1012/6/11

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Kodera, T., Fukuoka, Y., Takeda, K., Obata, T., Yoshida, K., Sawano, K., Uchida, K., Shiraki, Y., Tarucha, S., & Oda, S. (2012). Fabrication and characterization of Si/SiGe quantum dots with capping gate. In 2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012 [6243291] (2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012). https://doi.org/10.1109/SNW.2012.6243291