Fabrication of Si nanostructures for single electron device applications by anisotropic etching

Toshiro Hiramoto, Hiroki Ishikuro, Kenichi Saito, Tomoyuki Fujii, Takuya Saraya, Gen Hashiguchi, Toshiaki Ikoma

Research output: Contribution to journalArticle

19 Citations (Scopus)

Abstract

Si nanostructures for single electron device applications are successfully fabricated using a newly developed anisotropic etching technique. The minimum size of the Si nanostructures is about 10 nm, which is much smaller than the lithography limit. The novel process involves two anisotropic etching steps and one selective oxidation step, and is fully compatible with very large scale integration (VLSI) processes. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) observations indicate that the fabricated nanostructures are very uniform and atomically controlled. This process is promising for the future integration of single electron devices into VLSI chips.

Original languageEnglish
Pages (from-to)6664-6667
Number of pages4
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume35
Issue number12 SUPPL. B
Publication statusPublished - 1996 Dec 1
Externally publishedYes

Keywords

  • Anisotropic etching
  • MOSFET
  • Si nanostructures
  • Single electron devices
  • VLSI

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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