Folded fat H-Tree: An interconnection topology for dynamically reconfigurable processor array

Yutaka Yamada, Hideharu Amano, Michihiro Koibuchi, Akiya Jouraku, Kenichiro Anjo, Katsunobu Nishimura

Research output: Chapter in Book/Report/Conference proceedingChapter

3 Citations (Scopus)

Abstract

Fat H-Tree is a novel on-chip network topology for a dynamic reconfigurable processor array. It includes both fat tree and torus structure, and suitable to map tasks in a stream processing. For on-chip implementation, folding layout is also proposed. Evaluation results show that Fat H-Tree reduces the distance of H-Tree from 13% to 55%, and stretches the throughput almost three times.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
EditorsLaurence T. Yang, Minyi Guo, Guang R. Gao, Niraj K. Jha
PublisherSpringer Verlag
Pages301-311
Number of pages11
ISBN (Print)354022906X, 9783540229063
DOIs
Publication statusPublished - 2004 Jan 1

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume3207
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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    Yamada, Y., Amano, H., Koibuchi, M., Jouraku, A., Anjo, K., & Nishimura, K. (2004). Folded fat H-Tree: An interconnection topology for dynamically reconfigurable processor array. In L. T. Yang, M. Guo, G. R. Gao, & N. K. Jha (Eds.), Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (pp. 301-311). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 3207). Springer Verlag. https://doi.org/10.1007/978-3-540-30121-9_29