TY - GEN
T1 - FPGA-based accelerator for losslessly quantized convolutional neural networks
AU - Sit, Mankit
AU - Kazami, Ryosuke
AU - Amano, Hideharu
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2018/2/2
Y1 - 2018/2/2
N2 - Convolutional Neural Networks (CNN) have been widely used for various computer vision tasks. While GPUs are the most common platform for CNN implementation, FPGAs are promising alternatives to provide better energy efficiency. Recent work demonstrates the potential of network quantization to reduce the model size and enhance computation efficiency while maintaining comparable accuracy to the full precision counterparts. Quantized CNN is especially suitable for FPGA implementation due to the presence of values with non-trivial bitwidth. In this paper, we present the design of an FPGA-based accelerator for losslessly quantized CNNs using High Level Synthesis tool. The experiment result shows that our design achieves 12.9 GOPS/Watt for quantized Alexnet on Imagnet Dataset.
AB - Convolutional Neural Networks (CNN) have been widely used for various computer vision tasks. While GPUs are the most common platform for CNN implementation, FPGAs are promising alternatives to provide better energy efficiency. Recent work demonstrates the potential of network quantization to reduce the model size and enhance computation efficiency while maintaining comparable accuracy to the full precision counterparts. Quantized CNN is especially suitable for FPGA implementation due to the presence of values with non-trivial bitwidth. In this paper, we present the design of an FPGA-based accelerator for losslessly quantized CNNs using High Level Synthesis tool. The experiment result shows that our design achieves 12.9 GOPS/Watt for quantized Alexnet on Imagnet Dataset.
UR - http://www.scopus.com/inward/record.url?scp=85049398449&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85049398449&partnerID=8YFLogxK
U2 - 10.1109/FPT.2017.8280164
DO - 10.1109/FPT.2017.8280164
M3 - Conference contribution
AN - SCOPUS:85049398449
T3 - 2017 International Conference on Field-Programmable Technology, ICFPT 2017
SP - 295
EP - 298
BT - 2017 International Conference on Field-Programmable Technology, ICFPT 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 16th IEEE International Conference on Field-Programmable Technology, ICFPT 2017
Y2 - 11 December 2017 through 13 December 2017
ER -
