FPGA-based voltage control with PDM inverter for wideband drive system using T-type neutral-point-clamped topology

Hiroki Kurumatani; Seiichiro Katsura

doi:10.1109/ICMECH.2017.7921116

FPGA-based voltage control with PDM inverter for wideband drive system using T-type neutral-point-clamped topology

Hiroki Kurumatani, Seiichiro Katsura

Department of System Design Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

This paper shows a hardware design of pulse-density-modulation (PDM) inverter for wide band drive system. Broadband drive is one of the requirements for high speed motor drive. Linear power amplifier meets such requirement but also provides large energy consumption. In the paper, a class-D amplifier (switching amplifier) are designed and a broadband voltage control is conducted with FPGA-based PDM. FPGA realizes high speed switching and attains a high over sampling rate. This feature improves PDM performance and signal-to-noise rate (SNR). Furthermore, multi-leveling of inverter topology provides a synergistic enhancement. The paper shows analyses for PDM inverter and designs three level T-type neutral-point-clamped (NPC) inverter. Prototype inverter is shown and a performance validation of designed system is conducted.

Original language	English
Title of host publication	Proceedings - 2017 IEEE International Conference on Mechatronics, ICM 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	272-277
Number of pages	6
ISBN (Electronic)	9781509045389
DOIs	https://doi.org/10.1109/ICMECH.2017.7921116
Publication status	Published - 2017 May 6
Event	2017 IEEE International Conference on Mechatronics, ICM 2017 - Gippsland, Australia Duration: 2017 Feb 13 → 2017 Feb 15

Other

Other	2017 IEEE International Conference on Mechatronics, ICM 2017
Country	Australia
City	Gippsland
Period	17/2/13 → 17/2/15

ASJC Scopus subject areas

Electrical and Electronic Engineering
Mechanical Engineering
Control and Optimization

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FPGA-based voltage control with PDM inverter for wideband drive system using T-type neutral-point-clamped topology. / Kurumatani, Hiroki; Katsura, Seiichiro.

Proceedings - 2017 IEEE International Conference on Mechatronics, ICM 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 272-277 7921116.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kurumatani, H & Katsura, S 2017, FPGA-based voltage control with PDM inverter for wideband drive system using T-type neutral-point-clamped topology. in Proceedings - 2017 IEEE International Conference on Mechatronics, ICM 2017., 7921116, Institute of Electrical and Electronics Engineers Inc., pp. 272-277, 2017 IEEE International Conference on Mechatronics, ICM 2017, Gippsland, Australia, 17/2/13. https://doi.org/10.1109/ICMECH.2017.7921116

@inproceedings{e97c2d9059c946b0a80bd094a85e0703,

title = "FPGA-based voltage control with PDM inverter for wideband drive system using T-type neutral-point-clamped topology",

abstract = "This paper shows a hardware design of pulse-density-modulation (PDM) inverter for wide band drive system. Broadband drive is one of the requirements for high speed motor drive. Linear power amplifier meets such requirement but also provides large energy consumption. In the paper, a class-D amplifier (switching amplifier) are designed and a broadband voltage control is conducted with FPGA-based PDM. FPGA realizes high speed switching and attains a high over sampling rate. This feature improves PDM performance and signal-to-noise rate (SNR). Furthermore, multi-leveling of inverter topology provides a synergistic enhancement. The paper shows analyses for PDM inverter and designs three level T-type neutral-point-clamped (NPC) inverter. Prototype inverter is shown and a performance validation of designed system is conducted.",

author = "Hiroki Kurumatani and Seiichiro Katsura",

year = "2017",

month = may,

day = "6",

doi = "10.1109/ICMECH.2017.7921116",

language = "English",

pages = "272--277",

booktitle = "Proceedings - 2017 IEEE International Conference on Mechatronics, ICM 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2017 IEEE International Conference on Mechatronics, ICM 2017 ; Conference date: 13-02-2017 Through 15-02-2017",

}

TY - GEN

T1 - FPGA-based voltage control with PDM inverter for wideband drive system using T-type neutral-point-clamped topology

AU - Kurumatani, Hiroki

AU - Katsura, Seiichiro

PY - 2017/5/6

Y1 - 2017/5/6

N2 - This paper shows a hardware design of pulse-density-modulation (PDM) inverter for wide band drive system. Broadband drive is one of the requirements for high speed motor drive. Linear power amplifier meets such requirement but also provides large energy consumption. In the paper, a class-D amplifier (switching amplifier) are designed and a broadband voltage control is conducted with FPGA-based PDM. FPGA realizes high speed switching and attains a high over sampling rate. This feature improves PDM performance and signal-to-noise rate (SNR). Furthermore, multi-leveling of inverter topology provides a synergistic enhancement. The paper shows analyses for PDM inverter and designs three level T-type neutral-point-clamped (NPC) inverter. Prototype inverter is shown and a performance validation of designed system is conducted.

AB - This paper shows a hardware design of pulse-density-modulation (PDM) inverter for wide band drive system. Broadband drive is one of the requirements for high speed motor drive. Linear power amplifier meets such requirement but also provides large energy consumption. In the paper, a class-D amplifier (switching amplifier) are designed and a broadband voltage control is conducted with FPGA-based PDM. FPGA realizes high speed switching and attains a high over sampling rate. This feature improves PDM performance and signal-to-noise rate (SNR). Furthermore, multi-leveling of inverter topology provides a synergistic enhancement. The paper shows analyses for PDM inverter and designs three level T-type neutral-point-clamped (NPC) inverter. Prototype inverter is shown and a performance validation of designed system is conducted.

UR - http://www.scopus.com/inward/record.url?scp=85020034465&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85020034465&partnerID=8YFLogxK

U2 - 10.1109/ICMECH.2017.7921116

DO - 10.1109/ICMECH.2017.7921116

M3 - Conference contribution

AN - SCOPUS:85020034465

SP - 272

EP - 277

BT - Proceedings - 2017 IEEE International Conference on Mechatronics, ICM 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2017 IEEE International Conference on Mechatronics, ICM 2017

Y2 - 13 February 2017 through 15 February 2017

ER -