Fpga/python co-design for lane line detection on a pynq-z1 board

Koki Honda, Kaijie Wei, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents the implementation of lane line detection on FPGA and Python. Lane line detection consists of three functions, median blur, adaptive threshold, and Hough transform. We implemented only accumulation of Hough transform on FPGA. Although the Hough transform cannot be implemented on a low-end FPGA board if implemented directly, by reducing ρθ space, it was successfully implemented on a low-end FPGA board. The rest of the Hough transform was implemented using Python's NumPy and SciPy, and OpenCV. Although it was very easy to write, it did not become a bottleneck for the whole process because of its effectiveness. As a result, we could achieve a 3.9x speedup compared to OpenCV and kept the developing cost down. When implementing median blur and adaptive threshold on an FPGA, we could achieve a 6.34x speedup.

Original languageEnglish
Title of host publicationProceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages53-60
Number of pages8
ISBN (Electronic)9781728148823
DOIs
Publication statusPublished - 2019 Oct
Event13th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019 - Singapore, Singapore
Duration: 2019 Oct 12019 Oct 4

Publication series

NameProceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019

Conference

Conference13th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
CountrySingapore
CitySingapore
Period19/10/119/10/4

Fingerprint

Lane Detection
Line Detection
Co-design
Python
Hough Transform
Hough transforms
Field Programmable Gate Array
Field programmable gate arrays (FPGA)
Adaptive Threshold
Speedup
Costs

Keywords

  • fpga
  • image processing
  • PYNQ

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Control and Optimization

Cite this

Honda, K., Wei, K., & Amano, H. (2019). Fpga/python co-design for lane line detection on a pynq-z1 board. In Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019 (pp. 53-60). [8906682] (Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/MCSoC.2019.00015

Fpga/python co-design for lane line detection on a pynq-z1 board. / Honda, Koki; Wei, Kaijie; Amano, Hideharu.

Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 53-60 8906682 (Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Honda, K, Wei, K & Amano, H 2019, Fpga/python co-design for lane line detection on a pynq-z1 board. in Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019., 8906682, Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019, Institute of Electrical and Electronics Engineers Inc., pp. 53-60, 13th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019, Singapore, Singapore, 19/10/1. https://doi.org/10.1109/MCSoC.2019.00015
Honda K, Wei K, Amano H. Fpga/python co-design for lane line detection on a pynq-z1 board. In Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 53-60. 8906682. (Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019). https://doi.org/10.1109/MCSoC.2019.00015
Honda, Koki ; Wei, Kaijie ; Amano, Hideharu. / Fpga/python co-design for lane line detection on a pynq-z1 board. Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 53-60 (Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019).
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