Fully-Depleted SOI CMOS circuits and technology: For ultralow-power applications

Takayasu Sakurai, Akira Matsuzawa, Takakuni Douseki, Hideaki Matsuhashi, Toshiaki Tsuchiya, Yasuhisa Omura, Hiroshi Shimomura, Masashi Yonemaru, Koji Fujii, Atsushi Kameyama, Hiroshi Kawaguchi, Tsuneo Tsukahara, Minoru Kozaki, Masayoshi Kinoshita, Akihiro Sawada, Yasuyuki Matsuya, Jun Terada, Yoshitsugu Inagaki, Tsuneaki Fuse, Yusuke OhtomoHiroshi Koizumi, Shunsuke Baba, Kazuyoshi Nishimura, Yoshifumi Yoshida, Norio Hama, Tohru Mogami, Toshiro Hiramoto, Ken Uchida, Shin Ichi Takagi, Toshinori Numata

Research output: Book/ReportBook

47 Citations (Scopus)

Abstract

The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding. The authors present three examples of ultralow-power systems based on FD-SOI technology, providing every reader with practical knowledge on the technology and the circuits.

Original languageEnglish
PublisherSpringer US
Number of pages411
ISBN (Print)0387292179, 9780387292175
DOIs
Publication statusPublished - 2006 Dec 1

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ASJC Scopus subject areas

  • Engineering(all)

Cite this

Sakurai, T., Matsuzawa, A., Douseki, T., Matsuhashi, H., Tsuchiya, T., Omura, Y., Shimomura, H., Yonemaru, M., Fujii, K., Kameyama, A., Kawaguchi, H., Tsukahara, T., Kozaki, M., Kinoshita, M., Sawada, A., Matsuya, Y., Terada, J., Inagaki, Y., Fuse, T., ... Numata, T. (2006). Fully-Depleted SOI CMOS circuits and technology: For ultralow-power applications. Springer US. https://doi.org/10.1007/978-0-387-29218-2