Fully-Depleted SOI CMOS circuits and technology

For ultralow-power applications

Takayasu Sakurai, Akira Matsuzawa, Takakuni Douseki, Hideaki Matsuhashi, Toshiaki Tsuchiya, Yasuhisa Omura, Hiroshi Shimomura, Masashi Yonemaru, Koji Fujii, Atsushi Kameyama, Hiroshi Kawaguchi, Tsuneo Tsukahara, Minoru Kozaki, Masayoshi Kinoshita, Akihiro Sawada, Yasuyuki Matsuya, Jun Terada, Yoshitsugu Inagaki, Tsuneaki Fuse, Yusuke Ohtomo & 10 others Hiroshi Koizumi, Shunsuke Baba, Kazuyoshi Nishimura, Yoshifumi Yoshida, Norio Hama, Tohru Mogami, Toshiro Hiramoto, Ken Uchida, Shin Ichi Takagi, Toshinori Numata

Research output: Book/ReportBook

47 Citations (Scopus)

Abstract

The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding. The authors present three examples of ultralow-power systems based on FD-SOI technology, providing every reader with practical knowledge on the technology and the circuits.

Original languageEnglish
PublisherSpringer US
Number of pages411
ISBN (Print)0387292179, 9780387292175
DOIs
Publication statusPublished - 2006
Externally publishedYes

Fingerprint

Networks (circuits)
Electric potential
Scaling laws
Digital circuits
DC-DC converters
Explosions
Electric power utilization
Fabrication
Substrates

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Sakurai, T., Matsuzawa, A., Douseki, T., Matsuhashi, H., Tsuchiya, T., Omura, Y., ... Numata, T. (2006). Fully-Depleted SOI CMOS circuits and technology: For ultralow-power applications. Springer US. https://doi.org/10.1007/978-0-387-29218-2

Fully-Depleted SOI CMOS circuits and technology : For ultralow-power applications. / Sakurai, Takayasu; Matsuzawa, Akira; Douseki, Takakuni; Matsuhashi, Hideaki; Tsuchiya, Toshiaki; Omura, Yasuhisa; Shimomura, Hiroshi; Yonemaru, Masashi; Fujii, Koji; Kameyama, Atsushi; Kawaguchi, Hiroshi; Tsukahara, Tsuneo; Kozaki, Minoru; Kinoshita, Masayoshi; Sawada, Akihiro; Matsuya, Yasuyuki; Terada, Jun; Inagaki, Yoshitsugu; Fuse, Tsuneaki; Ohtomo, Yusuke; Koizumi, Hiroshi; Baba, Shunsuke; Nishimura, Kazuyoshi; Yoshida, Yoshifumi; Hama, Norio; Mogami, Tohru; Hiramoto, Toshiro; Uchida, Ken; Takagi, Shin Ichi; Numata, Toshinori.

Springer US, 2006. 411 p.

Research output: Book/ReportBook

Sakurai, T, Matsuzawa, A, Douseki, T, Matsuhashi, H, Tsuchiya, T, Omura, Y, Shimomura, H, Yonemaru, M, Fujii, K, Kameyama, A, Kawaguchi, H, Tsukahara, T, Kozaki, M, Kinoshita, M, Sawada, A, Matsuya, Y, Terada, J, Inagaki, Y, Fuse, T, Ohtomo, Y, Koizumi, H, Baba, S, Nishimura, K, Yoshida, Y, Hama, N, Mogami, T, Hiramoto, T, Uchida, K, Takagi, SI & Numata, T 2006, Fully-Depleted SOI CMOS circuits and technology: For ultralow-power applications. Springer US. https://doi.org/10.1007/978-0-387-29218-2
Sakurai T, Matsuzawa A, Douseki T, Matsuhashi H, Tsuchiya T, Omura Y et al. Fully-Depleted SOI CMOS circuits and technology: For ultralow-power applications. Springer US, 2006. 411 p. https://doi.org/10.1007/978-0-387-29218-2
Sakurai, Takayasu ; Matsuzawa, Akira ; Douseki, Takakuni ; Matsuhashi, Hideaki ; Tsuchiya, Toshiaki ; Omura, Yasuhisa ; Shimomura, Hiroshi ; Yonemaru, Masashi ; Fujii, Koji ; Kameyama, Atsushi ; Kawaguchi, Hiroshi ; Tsukahara, Tsuneo ; Kozaki, Minoru ; Kinoshita, Masayoshi ; Sawada, Akihiro ; Matsuya, Yasuyuki ; Terada, Jun ; Inagaki, Yoshitsugu ; Fuse, Tsuneaki ; Ohtomo, Yusuke ; Koizumi, Hiroshi ; Baba, Shunsuke ; Nishimura, Kazuyoshi ; Yoshida, Yoshifumi ; Hama, Norio ; Mogami, Tohru ; Hiramoto, Toshiro ; Uchida, Ken ; Takagi, Shin Ichi ; Numata, Toshinori. / Fully-Depleted SOI CMOS circuits and technology : For ultralow-power applications. Springer US, 2006. 411 p.
@book{e8c5a33345ca46f5b268f3a7cc191c9e,
title = "Fully-Depleted SOI CMOS circuits and technology: For ultralow-power applications",
abstract = "The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding. The authors present three examples of ultralow-power systems based on FD-SOI technology, providing every reader with practical knowledge on the technology and the circuits.",
author = "Takayasu Sakurai and Akira Matsuzawa and Takakuni Douseki and Hideaki Matsuhashi and Toshiaki Tsuchiya and Yasuhisa Omura and Hiroshi Shimomura and Masashi Yonemaru and Koji Fujii and Atsushi Kameyama and Hiroshi Kawaguchi and Tsuneo Tsukahara and Minoru Kozaki and Masayoshi Kinoshita and Akihiro Sawada and Yasuyuki Matsuya and Jun Terada and Yoshitsugu Inagaki and Tsuneaki Fuse and Yusuke Ohtomo and Hiroshi Koizumi and Shunsuke Baba and Kazuyoshi Nishimura and Yoshifumi Yoshida and Norio Hama and Tohru Mogami and Toshiro Hiramoto and Ken Uchida and Takagi, {Shin Ichi} and Toshinori Numata",
year = "2006",
doi = "10.1007/978-0-387-29218-2",
language = "English",
isbn = "0387292179",
publisher = "Springer US",

}

TY - BOOK

T1 - Fully-Depleted SOI CMOS circuits and technology

T2 - For ultralow-power applications

AU - Sakurai, Takayasu

AU - Matsuzawa, Akira

AU - Douseki, Takakuni

AU - Matsuhashi, Hideaki

AU - Tsuchiya, Toshiaki

AU - Omura, Yasuhisa

AU - Shimomura, Hiroshi

AU - Yonemaru, Masashi

AU - Fujii, Koji

AU - Kameyama, Atsushi

AU - Kawaguchi, Hiroshi

AU - Tsukahara, Tsuneo

AU - Kozaki, Minoru

AU - Kinoshita, Masayoshi

AU - Sawada, Akihiro

AU - Matsuya, Yasuyuki

AU - Terada, Jun

AU - Inagaki, Yoshitsugu

AU - Fuse, Tsuneaki

AU - Ohtomo, Yusuke

AU - Koizumi, Hiroshi

AU - Baba, Shunsuke

AU - Nishimura, Kazuyoshi

AU - Yoshida, Yoshifumi

AU - Hama, Norio

AU - Mogami, Tohru

AU - Hiramoto, Toshiro

AU - Uchida, Ken

AU - Takagi, Shin Ichi

AU - Numata, Toshinori

PY - 2006

Y1 - 2006

N2 - The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding. The authors present three examples of ultralow-power systems based on FD-SOI technology, providing every reader with practical knowledge on the technology and the circuits.

AB - The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding. The authors present three examples of ultralow-power systems based on FD-SOI technology, providing every reader with practical knowledge on the technology and the circuits.

UR - http://www.scopus.com/inward/record.url?scp=84889964429&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84889964429&partnerID=8YFLogxK

U2 - 10.1007/978-0-387-29218-2

DO - 10.1007/978-0-387-29218-2

M3 - Book

SN - 0387292179

SN - 9780387292175

BT - Fully-Depleted SOI CMOS circuits and technology

PB - Springer US

ER -