Fully Integrated OOK-Powered Pad-Less Deep Sub-Wavelength-Sized 5-GHz RFID with On-Chip Antenna Using Adiabatic Logic in 0.18μM CMOS

Yuta Toeda; Takumi Fujimaki; Mototsugu Hamada; Tadahiro Kuroda

doi:10.1109/VLSIC.2018.8502283

Fully Integrated OOK-Powered Pad-Less Deep Sub-Wavelength-Sized 5-GHz RFID with On-Chip Antenna Using Adiabatic Logic in 0.18μM CMOS

Yuta Toeda, Takumi Fujimaki, Mototsugu Hamada, Tadahiro Kuroda

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

A fully integrated pad-less 5-GHz RFID was developed in a 0.18 μm standard CMOS. It integrates an on-chip antenna, an RF-to-envelope power converter, a 128-bit ROM, and a load modulation circuit. It occupies 2.1 mm X 1.2 mm, and is much smaller than the wavelength of the carrier frequency. The ROM is implemented by an adiabatic shift register driven by a power clock, generated by the RF-to-envelope power converter. It is capable of 10 kbps backscattering communication at a distance of 10 cm with 24 dBm EIRP.

Original language	English
Title of host publication	2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	27-28
Number of pages	2
Volume	2018-June
ISBN (Electronic)	9781538667002
DOIs	https://doi.org/10.1109/VLSIC.2018.8502283
Publication status	Published - 2018 Oct 22
Event	32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018 - Honolulu, United States Duration: 2018 Jun 18 → 2018 Jun 22

Other

Other	32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018
Country	United States
City	Honolulu
Period	18/6/18 → 18/6/22

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/VLSIC.2018.8502283

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Cite this

Toeda, Y., Fujimaki, T., Hamada, M., & Kuroda, T. (2018). Fully Integrated OOK-Powered Pad-Less Deep Sub-Wavelength-Sized 5-GHz RFID with On-Chip Antenna Using Adiabatic Logic in 0.18μM CMOS. In 2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018 (Vol. 2018-June, pp. 27-28). [8502283] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIC.2018.8502283

Fully Integrated OOK-Powered Pad-Less Deep Sub-Wavelength-Sized 5-GHz RFID with On-Chip Antenna Using Adiabatic Logic in 0.18μM CMOS. / Toeda, Yuta; Fujimaki, Takumi; Hamada, Mototsugu; Kuroda, Tadahiro.

2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018. Vol. 2018-June Institute of Electrical and Electronics Engineers Inc., 2018. p. 27-28 8502283.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Toeda, Y, Fujimaki, T, Hamada, M & Kuroda, T 2018, Fully Integrated OOK-Powered Pad-Less Deep Sub-Wavelength-Sized 5-GHz RFID with On-Chip Antenna Using Adiabatic Logic in 0.18μM CMOS. in 2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018. vol. 2018-June, 8502283, Institute of Electrical and Electronics Engineers Inc., pp. 27-28, 32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018, Honolulu, United States, 18/6/18. https://doi.org/10.1109/VLSIC.2018.8502283

Toeda Y, Fujimaki T, Hamada M, Kuroda T. Fully Integrated OOK-Powered Pad-Less Deep Sub-Wavelength-Sized 5-GHz RFID with On-Chip Antenna Using Adiabatic Logic in 0.18μM CMOS. In 2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018. Vol. 2018-June. Institute of Electrical and Electronics Engineers Inc. 2018. p. 27-28. 8502283 https://doi.org/10.1109/VLSIC.2018.8502283

@inproceedings{bdb41bda098b4f4e8e13537e71900e0c,

title = "Fully Integrated OOK-Powered Pad-Less Deep Sub-Wavelength-Sized 5-GHz RFID with On-Chip Antenna Using Adiabatic Logic in 0.18μM CMOS",

abstract = "A fully integrated pad-less 5-GHz RFID was developed in a 0.18 μm standard CMOS. It integrates an on-chip antenna, an RF-to-envelope power converter, a 128-bit ROM, and a load modulation circuit. It occupies 2.1 mm X 1.2 mm, and is much smaller than the wavelength of the carrier frequency. The ROM is implemented by an adiabatic shift register driven by a power clock, generated by the RF-to-envelope power converter. It is capable of 10 kbps backscattering communication at a distance of 10 cm with 24 dBm EIRP.",

author = "Yuta Toeda and Takumi Fujimaki and Mototsugu Hamada and Tadahiro Kuroda",

year = "2018",

month = oct,

day = "22",

doi = "10.1109/VLSIC.2018.8502283",

language = "English",

volume = "2018-June",

pages = "27--28",

booktitle = "2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018 ; Conference date: 18-06-2018 Through 22-06-2018",

}

TY - GEN

T1 - Fully Integrated OOK-Powered Pad-Less Deep Sub-Wavelength-Sized 5-GHz RFID with On-Chip Antenna Using Adiabatic Logic in 0.18μM CMOS

AU - Toeda, Yuta

AU - Fujimaki, Takumi

AU - Hamada, Mototsugu

AU - Kuroda, Tadahiro

PY - 2018/10/22

Y1 - 2018/10/22

N2 - A fully integrated pad-less 5-GHz RFID was developed in a 0.18 μm standard CMOS. It integrates an on-chip antenna, an RF-to-envelope power converter, a 128-bit ROM, and a load modulation circuit. It occupies 2.1 mm X 1.2 mm, and is much smaller than the wavelength of the carrier frequency. The ROM is implemented by an adiabatic shift register driven by a power clock, generated by the RF-to-envelope power converter. It is capable of 10 kbps backscattering communication at a distance of 10 cm with 24 dBm EIRP.

AB - A fully integrated pad-less 5-GHz RFID was developed in a 0.18 μm standard CMOS. It integrates an on-chip antenna, an RF-to-envelope power converter, a 128-bit ROM, and a load modulation circuit. It occupies 2.1 mm X 1.2 mm, and is much smaller than the wavelength of the carrier frequency. The ROM is implemented by an adiabatic shift register driven by a power clock, generated by the RF-to-envelope power converter. It is capable of 10 kbps backscattering communication at a distance of 10 cm with 24 dBm EIRP.

UR - http://www.scopus.com/inward/record.url?scp=85056884409&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85056884409&partnerID=8YFLogxK

U2 - 10.1109/VLSIC.2018.8502283

DO - 10.1109/VLSIC.2018.8502283

M3 - Conference contribution

AN - SCOPUS:85056884409

VL - 2018-June

SP - 27

EP - 28

BT - 2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018

Y2 - 18 June 2018 through 22 June 2018

ER -