Geyser-1: A MIPS R3000 CPU core with fine grain runtime power gating

D. Ikebuchi, N. Seki, Y. Kojima, M. Kamata, L. Zhao, H. Amano, T. Shirai, S. Koyamat, T. Hashida, Y. Umahashi, H. Masuda, K. Usami, S. Takeda, H. Nakamura, M. Namiki, M. Kondo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

33 Citations (Scopus)

Abstract

Geyser-1, a prototype MIPS R3000 CPU with fine grain runtime PG for major computational components in the execution stage is available. Function units such as CLU, shifter, multiplier and divider are power-gated and controlled at runtime such that only the function unit to be used is powered-on to minimize the leakage power. The evaluation results on the real chip reveals that the fine grain runtime PG mechanism works without electric problems. It reduces the leakage power 7% at 25 °C and 24% at 80°C. The evaluation results using benchmark programs show that the power consumption can be reduced from 3% at 25°C and 30% at 80° C.

Original languageEnglish
Title of host publicationProceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009
Pages281-284
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
Event2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 - Taipei, Taiwan, Province of China
Duration: 2009 Nov 162009 Nov 18

Publication series

NameProceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009

Conference

Conference2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009
CountryTaiwan, Province of China
CityTaipei
Period09/11/1609/11/18

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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