Hardware for Accelerating Anonymization Transparent to Network

Soichiro Shohata, Yuuichi Nakamura, Hiroaki Nishi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

With the increase in the number of Internet of Things (IoT) devices, many applications using the data accumulated from IoT devices have been proposed. Consequently, privacy violation due to data disclosure is becoming a problem. Data anonymization is a technique for publishing data while preserving data privacy and is an effective method for solving the problem of privacy violation. There are several requirements for implementing anonymization systems suitable for IoT devices, where the amount of hardware and software resources, function extensibility, and processing throughput are limited. To satisfy these requirements, anonymization hardware for anonymizing data packets from IoT devices is proposed. The proposed hardware is allocated on the intermediate location of network and anonymizes the data packet stream from IoT devices transparently. The proposed anonymization process does not affect data communication or routing. This transparency allows an additional anonymization function to be installed on all types of IoT devices without modifying the devices. The proposed hardware allows IoT devices to anonymize the data packet stream. To reduce the latency and achieve transparent anonymization at a low cost, the proposed anonymization hardware was implemented using a field-programmable gate array. The throughput and latency of the testbed of the proposed hardware were 1,286 Mbps and 330 ns, respectively. The power consumption of the proposed hardware was lower than that for a software implementation.

Original languageEnglish
Title of host publicationProceedings - 2018 6th International Symposium on Computing and Networking, CANDAR 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages181-187
Number of pages7
ISBN (Electronic)9781538691823
DOIs
Publication statusPublished - 2018 Dec 27
Event6th International Symposium on Computing and Networking, CANDAR 2018 - Takayama, Japan
Duration: 2018 Nov 272018 Nov 30

Publication series

NameProceedings - 2018 6th International Symposium on Computing and Networking, CANDAR 2018

Conference

Conference6th International Symposium on Computing and Networking, CANDAR 2018
CountryJapan
CityTakayama
Period18/11/2718/11/30

Keywords

  • anonymization
  • FPGA
  • networking
  • transparency

ASJC Scopus subject areas

  • Hardware and Architecture
  • Computer Networks and Communications
  • Software
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Shohata, S., Nakamura, Y., & Nishi, H. (2018). Hardware for Accelerating Anonymization Transparent to Network. In Proceedings - 2018 6th International Symposium on Computing and Networking, CANDAR 2018 (pp. 181-187). [8594761] (Proceedings - 2018 6th International Symposium on Computing and Networking, CANDAR 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CANDAR.2018.00032