A 1. 5- mu m dual layer metal CMOS standard cell library with subnanosecond loaded gate delays is discussed. The library has over 160 standard cells, 80 I/O cells and 17 2900 megacells as well as second sources.
|Number of pages||4|
|Journal||Proceedings of the Custom Integrated Circuits Conference|
|Publication status||Published - 1987 Jan 1|
ASJC Scopus subject areas
- Electrical and Electronic Engineering