High-sensitivity 1 Gbit/s CMOS receiver integrated with GaAs- or InGaAs-photodiode by wafer-bonding

T. Nakahara, H. Tsuda, N. Ishihara, K. Tateno, C. Amano

Research output: Contribution to journalArticle

11 Citations (Scopus)

Abstract

1Gbit/s III-V/CMOS hybrid receivers consisting of a GaAs- or InGaAs-photodiode and a 0.5μm CMOS receiver circuit have been realised by wafer-bonding. The circuit is simple and compact with high sensitivity and broad bandwidth due to the direct attachment of III-V PDs and the absence of any parasitic capacitance. Sensitivities of -27.4 and -28.0dBm at 1 Gbit/s are demonstrated for 0.85 and 1.55 μm receivers, respectively.

Original languageEnglish
Pages (from-to)781-783
Number of pages3
JournalElectronics Letters
Volume37
Issue number12
DOIs
Publication statusPublished - 2001 Jun 7
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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