HIGH-SPEED TIME DIVISION SWITCH FOR 32-MBIT/S BEARER RATE SIGNALS.

Naoaki Yamanaka, Hiroshi Miyanaga, Yousuke Yamamoto

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

A high-speed time-division switch used in a 32-Mb/s bearer-signal communications system is described. System performance is realized by using three technologies. The first is a switch structure referred to as a 2-RAM 2-bank structure which ensures high-speed performance by increasing switching throughput four times over that of the basic structure. The second is the inclusion in the switch of two types of peripheral logic developed using Si-bipolar super-self-aligned process technology. The third is high-speed synchronous transmission of data. A large-channel-capacity time-division switching network is also discussed. In conjunction with the network, these technologies make it possible to realize the ISDN time-division switches necessary for such services as TV and high-definition TV communications.

Original languageEnglish
Pages (from-to)1249-1255
Number of pages7
JournalIEEE Journal on Selected Areas in Communications
VolumeSAC-5
Issue number8
Publication statusPublished - 1987 Oct
Externally publishedYes

Fingerprint

Switches
Voice/data communication systems
Channel capacity
Switching networks
Random access storage
Communication systems
Throughput
Communication

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

Cite this

HIGH-SPEED TIME DIVISION SWITCH FOR 32-MBIT/S BEARER RATE SIGNALS. / Yamanaka, Naoaki; Miyanaga, Hiroshi; Yamamoto, Yousuke.

In: IEEE Journal on Selected Areas in Communications, Vol. SAC-5, No. 8, 10.1987, p. 1249-1255.

Research output: Contribution to journalArticle

Yamanaka, Naoaki ; Miyanaga, Hiroshi ; Yamamoto, Yousuke. / HIGH-SPEED TIME DIVISION SWITCH FOR 32-MBIT/S BEARER RATE SIGNALS. In: IEEE Journal on Selected Areas in Communications. 1987 ; Vol. SAC-5, No. 8. pp. 1249-1255.
@article{6574c902a4194bfc9663c5dbcea07f0b,
title = "HIGH-SPEED TIME DIVISION SWITCH FOR 32-MBIT/S BEARER RATE SIGNALS.",
abstract = "A high-speed time-division switch used in a 32-Mb/s bearer-signal communications system is described. System performance is realized by using three technologies. The first is a switch structure referred to as a 2-RAM 2-bank structure which ensures high-speed performance by increasing switching throughput four times over that of the basic structure. The second is the inclusion in the switch of two types of peripheral logic developed using Si-bipolar super-self-aligned process technology. The third is high-speed synchronous transmission of data. A large-channel-capacity time-division switching network is also discussed. In conjunction with the network, these technologies make it possible to realize the ISDN time-division switches necessary for such services as TV and high-definition TV communications.",
author = "Naoaki Yamanaka and Hiroshi Miyanaga and Yousuke Yamamoto",
year = "1987",
month = "10",
language = "English",
volume = "SAC-5",
pages = "1249--1255",
journal = "IEEE Journal on Selected Areas in Communications",
issn = "0733-8716",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "8",

}

TY - JOUR

T1 - HIGH-SPEED TIME DIVISION SWITCH FOR 32-MBIT/S BEARER RATE SIGNALS.

AU - Yamanaka, Naoaki

AU - Miyanaga, Hiroshi

AU - Yamamoto, Yousuke

PY - 1987/10

Y1 - 1987/10

N2 - A high-speed time-division switch used in a 32-Mb/s bearer-signal communications system is described. System performance is realized by using three technologies. The first is a switch structure referred to as a 2-RAM 2-bank structure which ensures high-speed performance by increasing switching throughput four times over that of the basic structure. The second is the inclusion in the switch of two types of peripheral logic developed using Si-bipolar super-self-aligned process technology. The third is high-speed synchronous transmission of data. A large-channel-capacity time-division switching network is also discussed. In conjunction with the network, these technologies make it possible to realize the ISDN time-division switches necessary for such services as TV and high-definition TV communications.

AB - A high-speed time-division switch used in a 32-Mb/s bearer-signal communications system is described. System performance is realized by using three technologies. The first is a switch structure referred to as a 2-RAM 2-bank structure which ensures high-speed performance by increasing switching throughput four times over that of the basic structure. The second is the inclusion in the switch of two types of peripheral logic developed using Si-bipolar super-self-aligned process technology. The third is high-speed synchronous transmission of data. A large-channel-capacity time-division switching network is also discussed. In conjunction with the network, these technologies make it possible to realize the ISDN time-division switches necessary for such services as TV and high-definition TV communications.

UR - http://www.scopus.com/inward/record.url?scp=0023435341&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0023435341&partnerID=8YFLogxK

M3 - Article

VL - SAC-5

SP - 1249

EP - 1255

JO - IEEE Journal on Selected Areas in Communications

JF - IEEE Journal on Selected Areas in Communications

SN - 0733-8716

IS - 8

ER -