High-throughput and low-cost hardware accelerator for privacy preserving publishing

Fumito Yamaguchi, Hiroaki Nishi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Deep Packet Inspection (DPI) has become crucial for providing rich internet services, such as intrusion and phishing protection, but the use of DPI raises concerns for protecting the privacy of internet users. In this paper, a RAM-based hardware anonymizer is proposed for implementation on a Virtex-5 FPGA device. The results of the hardware anonymizer showed that the proposed architecture reduced circuit usage by 40%.

Original languageEnglish
Title of host publicationProceedings - 2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages242
Number of pages1
ISBN (Print)9781479951116
DOIs
Publication statusPublished - 2014 Jul 21
Event22nd IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014 - Boston, United States
Duration: 2014 May 112014 May 13

Other

Other22nd IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014
CountryUnited States
CityBoston
Period14/5/1114/5/13

Fingerprint

Particle accelerators
Inspection
Throughput
Internet
Hardware
Random access storage
Field programmable gate arrays (FPGA)
Costs
Networks (circuits)

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software
  • Electrical and Electronic Engineering

Cite this

Yamaguchi, F., & Nishi, H. (2014). High-throughput and low-cost hardware accelerator for privacy preserving publishing. In Proceedings - 2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014 (pp. 242). [6861639] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FCCM.2014.77

High-throughput and low-cost hardware accelerator for privacy preserving publishing. / Yamaguchi, Fumito; Nishi, Hiroaki.

Proceedings - 2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 242 6861639.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yamaguchi, F & Nishi, H 2014, High-throughput and low-cost hardware accelerator for privacy preserving publishing. in Proceedings - 2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014., 6861639, Institute of Electrical and Electronics Engineers Inc., pp. 242, 22nd IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014, Boston, United States, 14/5/11. https://doi.org/10.1109/FCCM.2014.77
Yamaguchi F, Nishi H. High-throughput and low-cost hardware accelerator for privacy preserving publishing. In Proceedings - 2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. 242. 6861639 https://doi.org/10.1109/FCCM.2014.77
Yamaguchi, Fumito ; Nishi, Hiroaki. / High-throughput and low-cost hardware accelerator for privacy preserving publishing. Proceedings - 2014 IEEE 22nd International Symposium on Field-Programmable Custom Computing Machines, FCCM 2014. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 242
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