Abstract
Simple Serial Synchronized (SSS) Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and permits the bit-serial message combining mechanism. From the theoretical analysis and empirical results, it appears that the influence of the hot spot contention is not catastrophic in the small size SSS-MIN (16×16) when some parallel programs from SPLASH benchmark run. In this situation, the effect of the message combining is small. However, in a large system (256 processors), the pass through ratio improves by 11% when a parallel program with relatively large access ratio (r = 0.4) runs. Since the additional hardware for the message combining is only 20% in the SSS-MIN, the message combining is useful in large systems.
| Original language | English |
|---|---|
| Title of host publication | IEEE Symposium on Parallel and Distributed Processing - Proceedings |
| Editors | Anon |
| Publisher | IEEE |
| Pages | 298-305 |
| Number of pages | 8 |
| Publication status | Published - 1996 |
| Event | Proceedings of the 1996 8th IEEE Symposium on Parallel and Distributed Processing - New Orleans, LA, USA Duration: 1996 Oct 23 → 1996 Oct 26 |
Other
| Other | Proceedings of the 1996 8th IEEE Symposium on Parallel and Distributed Processing |
|---|---|
| City | New Orleans, LA, USA |
| Period | 96/10/23 → 96/10/26 |
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ASJC Scopus subject areas
- Engineering(all)
Cite this
Hot spot contention and message combining in the simple serial synchronized multistage interconnection network. / Hanawa, Toshihiro; Fujiwara, Takashi; Amano, Hideharu.
IEEE Symposium on Parallel and Distributed Processing - Proceedings. ed. / Anon. IEEE, 1996. p. 298-305.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Hot spot contention and message combining in the simple serial synchronized multistage interconnection network
AU - Hanawa, Toshihiro
AU - Fujiwara, Takashi
AU - Amano, Hideharu
PY - 1996
Y1 - 1996
N2 - Simple Serial Synchronized (SSS) Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and permits the bit-serial message combining mechanism. From the theoretical analysis and empirical results, it appears that the influence of the hot spot contention is not catastrophic in the small size SSS-MIN (16×16) when some parallel programs from SPLASH benchmark run. In this situation, the effect of the message combining is small. However, in a large system (256 processors), the pass through ratio improves by 11% when a parallel program with relatively large access ratio (r = 0.4) runs. Since the additional hardware for the message combining is only 20% in the SSS-MIN, the message combining is useful in large systems.
AB - Simple Serial Synchronized (SSS) Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and permits the bit-serial message combining mechanism. From the theoretical analysis and empirical results, it appears that the influence of the hot spot contention is not catastrophic in the small size SSS-MIN (16×16) when some parallel programs from SPLASH benchmark run. In this situation, the effect of the message combining is small. However, in a large system (256 processors), the pass through ratio improves by 11% when a parallel program with relatively large access ratio (r = 0.4) runs. Since the additional hardware for the message combining is only 20% in the SSS-MIN, the message combining is useful in large systems.
UR - http://www.scopus.com/inward/record.url?scp=0030420048&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0030420048&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:0030420048
SP - 298
EP - 305
BT - IEEE Symposium on Parallel and Distributed Processing - Proceedings
A2 - Anon, null
PB - IEEE
ER -