Hot spot contention and message combining in the simple serial synchronized multistage interconnection network

Toshihiro Hanawa; Takashi Fujiwara; Hideharu Amano

Hot spot contention and message combining in the simple serial synchronized multistage interconnection network

Toshihiro Hanawa, Takashi Fujiwara, Hideharu Amano

Department of Information and Computer Science

Research output: Contribution to journal › Conference article › peer-review

1 Citation (Scopus)

Abstract

Simple Serial Synchronized (SSS) Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and permits the bit-serial message combining mechanism. From the theoretical analysis and empirical results, it appears that the influence of the hot spot contention is not catastrophic in the small size SSS-MIN (16×16) when some parallel programs from SPLASH benchmark run. In this situation, the effect of the message combining is small. However, in a large system (256 processors), the pass through ratio improves by 11% when a parallel program with relatively large access ratio (r = 0.4) runs. Since the additional hardware for the message combining is only 20% in the SSS-MIN, the message combining is useful in large systems.

Original language	English
Pages (from-to)	298-305
Number of pages	8
Journal	IEEE Symposium on Parallel and Distributed Processing - Proceedings
Publication status	Published - 1996 Dec 1
Event	Proceedings of the 1996 8th IEEE Symposium on Parallel and Distributed Processing - New Orleans, LA, USA Duration: 1996 Oct 23 → 1996 Oct 26

ASJC Scopus subject areas

Engineering(all)

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@article{404f60859e5344f9a6b515885299c1de,

title = "Hot spot contention and message combining in the simple serial synchronized multistage interconnection network",

abstract = "Simple Serial Synchronized (SSS) Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and permits the bit-serial message combining mechanism. From the theoretical analysis and empirical results, it appears that the influence of the hot spot contention is not catastrophic in the small size SSS-MIN (16×16) when some parallel programs from SPLASH benchmark run. In this situation, the effect of the message combining is small. However, in a large system (256 processors), the pass through ratio improves by 11% when a parallel program with relatively large access ratio (r = 0.4) runs. Since the additional hardware for the message combining is only 20% in the SSS-MIN, the message combining is useful in large systems.",

author = "Toshihiro Hanawa and Takashi Fujiwara and Hideharu Amano",

year = "1996",

month = dec,

day = "1",

language = "English",

pages = "298--305",

journal = "IEEE Symposium on Parallel and Distributed Processing - Proceedings",

issn = "1063-6374",

note = "Proceedings of the 1996 8th IEEE Symposium on Parallel and Distributed Processing ; Conference date: 23-10-1996 Through 26-10-1996",

}

TY - JOUR

T1 - Hot spot contention and message combining in the simple serial synchronized multistage interconnection network

AU - Hanawa, Toshihiro

AU - Fujiwara, Takashi

AU - Amano, Hideharu

PY - 1996/12/1

Y1 - 1996/12/1

N2 - Simple Serial Synchronized (SSS) Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and permits the bit-serial message combining mechanism. From the theoretical analysis and empirical results, it appears that the influence of the hot spot contention is not catastrophic in the small size SSS-MIN (16×16) when some parallel programs from SPLASH benchmark run. In this situation, the effect of the message combining is small. However, in a large system (256 processors), the pass through ratio improves by 11% when a parallel program with relatively large access ratio (r = 0.4) runs. Since the additional hardware for the message combining is only 20% in the SSS-MIN, the message combining is useful in large systems.

AB - Simple Serial Synchronized (SSS) Multistage Interconnection Network (MIN) is a novel MIN architecture for connecting processors and memory modules in multiprocessors. Synchronized bit-serial communication simplifies the structure/control, and permits the bit-serial message combining mechanism. From the theoretical analysis and empirical results, it appears that the influence of the hot spot contention is not catastrophic in the small size SSS-MIN (16×16) when some parallel programs from SPLASH benchmark run. In this situation, the effect of the message combining is small. However, in a large system (256 processors), the pass through ratio improves by 11% when a parallel program with relatively large access ratio (r = 0.4) runs. Since the additional hardware for the message combining is only 20% in the SSS-MIN, the message combining is useful in large systems.

UR - http://www.scopus.com/inward/record.url?scp=0030420048&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030420048&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0030420048

SP - 298

EP - 305

JO - IEEE Symposium on Parallel and Distributed Processing - Proceedings

JF - IEEE Symposium on Parallel and Distributed Processing - Proceedings

SN - 1063-6374

T2 - Proceedings of the 1996 8th IEEE Symposium on Parallel and Distributed Processing

Y2 - 23 October 1996 through 26 October 1996

ER -