Abstract
This paper proposes 3D stacked module consisting of image sensor and digital logic dies connected through inductive coupling channels. Evaluation of a prototype module revealed radiation noise from the inductive coils to the image sensor is less than 0.4-LSB range along with ADC code, i.e., negligible. Aiming at high frame rate image sensor/processing module exploiting this attractive off-die interface, we also worked on resolving another throughput-limiter, namely power consuming TDC used in column parallel ADCs. Novel intermittent TDC operation scheme presented in this paper can reduce its power dissipation 57% from conventional ones.
Original language | English |
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Title of host publication | IEEE Symposium on VLSI Circuits, Digest of Technical Papers |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | C82-C83 |
Volume | 2015-August |
ISBN (Print) | 9784863485020 |
DOIs | |
Publication status | Published - 2015 Aug 31 |
Event | 29th Annual Symposium on VLSI Circuits, VLSI Circuits 2015 - Kyoto, Japan Duration: 2015 Jun 17 → 2015 Jun 19 |
Other
Other | 29th Annual Symposium on VLSI Circuits, VLSI Circuits 2015 |
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Country/Territory | Japan |
City | Kyoto |
Period | 15/6/17 → 15/6/19 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials