Implementation and evaluation of a high speed license plate recognition system on an FPGA

Takamasa Kanamori, Hideharu Amano, Masatoshi Arai, Daisuke Konno, Tomomichi Nanba, Yoshiaki Ajioka

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

In order to address some problems on increasing traffic accidents, many researchers have paid attention to active safety techniques using sophisticated image processing like license number recognition. However, it is enough for warning a driver against danger of collision to measure distance to a licence plate of a proceeding car. This paper proposes a high speed FPGA off-loading engine for detecting the licence plate. A complicated algorithm is written in Handel-C, and parallel processing is explicitly utilized in every level of implementation; an input image is segmented into 16 areas, and each area is processed in parallel by a multiple calculation unit executing pipeline processing and a distributed memory module. A prototype circuit implemented on a general purpose FPGA board achieved 4.16 times performance as software execution on a Pentium-III desktop PC. The highest performance in literature; 100 frames per second; can be achieved even though extra computation time on an embedded processor and communication time with it are considered.

Original languageEnglish
Title of host publicationCIT 2007
Subtitle of host publication7th IEEE International Conference on Computer and Information Technology
Pages567-572
Number of pages6
DOIs
Publication statusPublished - 2007 Dec 1
EventCIT 2007: 7th IEEE International Conference on Computer and Information Technology - Aizu-Wakamatsu, Fukushima, Japan
Duration: 2007 Oct 162007 Oct 19

Publication series

NameCIT 2007: 7th IEEE International Conference on Computer and Information Technology

Other

OtherCIT 2007: 7th IEEE International Conference on Computer and Information Technology
CountryJapan
CityAizu-Wakamatsu, Fukushima
Period07/10/1607/10/19

Keywords

  • Dynamically reconfigurable processor
  • Multiprocessing execution
  • Single-processing execution

ASJC Scopus subject areas

  • Computer Science Applications
  • Information Systems
  • Software
  • Mathematics(all)

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