Implementation of super high definition image processing on HiPIPE

Tetsurou Fujii, Tomoko Sawabe, Naohisa Ohta, Sadayasu Ono

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

In order to manipulate SHD (super high definition) images, a novel parallel processing unit called HiPIPE (Highly Parallel Image Processing Engine) is developed as a project of NOVI-II. The engine is connected to an SHD image display unit and an image data storage unit. Extremely high computational power is obtained by a multicomputer type parallel processing technique. 128 processing elements are connected by a mesh network. Various image coding schemes are carefully explored from the viewpoint of parallel processing, and the problem of processor connections is examined. A novel load-balancing technique, called 2-dimensional butterfly data shuffling, is developed and implemented. The current version of HiPIPE uses just 128 scaler processing elements and has more than twice the power of a single-processor CRAY-2 for a still SHD image coding task.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages348-351
Number of pages4
Volume1
Publication statusPublished - 1991
Event1991 IEEE International Symposium on Circuits and Systems Part 1 (of 5) - Singapore, Singapore
Duration: 1991 Jun 111991 Jun 14

Other

Other1991 IEEE International Symposium on Circuits and Systems Part 1 (of 5)
CitySingapore, Singapore
Period91/6/1191/6/14

Fingerprint

Image processing
Engines
Processing
Image coding
Resource allocation
Display devices
Data storage equipment

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Fujii, T., Sawabe, T., Ohta, N., & Ono, S. (1991). Implementation of super high definition image processing on HiPIPE. In Proceedings - IEEE International Symposium on Circuits and Systems (Vol. 1, pp. 348-351). Publ by IEEE.

Implementation of super high definition image processing on HiPIPE. / Fujii, Tetsurou; Sawabe, Tomoko; Ohta, Naohisa; Ono, Sadayasu.

Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 1 Publ by IEEE, 1991. p. 348-351.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fujii, T, Sawabe, T, Ohta, N & Ono, S 1991, Implementation of super high definition image processing on HiPIPE. in Proceedings - IEEE International Symposium on Circuits and Systems. vol. 1, Publ by IEEE, pp. 348-351, 1991 IEEE International Symposium on Circuits and Systems Part 1 (of 5), Singapore, Singapore, 91/6/11.
Fujii T, Sawabe T, Ohta N, Ono S. Implementation of super high definition image processing on HiPIPE. In Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 1. Publ by IEEE. 1991. p. 348-351
Fujii, Tetsurou ; Sawabe, Tomoko ; Ohta, Naohisa ; Ono, Sadayasu. / Implementation of super high definition image processing on HiPIPE. Proceedings - IEEE International Symposium on Circuits and Systems. Vol. 1 Publ by IEEE, 1991. pp. 348-351
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