Inductively-powered wireless solid-state drive (SSD) system with merged error correction of high-speed non-contact data links and NAND flash memory

Atsutake Kosuge, Junki Hashiba, Toru Kawajiri, So Hasegawa, Tsunaaki Shidei, Hiroki Ishikuro, Tadahiro Kuroda, Ken Takeuchi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper presents a wireless solid-state drive (SSD) system for future applications of large volume storage in mobile devices or data centers. The wireless interface in the developed system consists of an inductive-coupling power link with a fast transmitting power control and high-speed data links with transmission line couplers (TLCs). The wireless power link can deliver 1W from the host side to the SSD side. The full duplex wireless data interface achieved raw data rate of 1.6Gbps/link. The error correction block for NAND flash memory system can also correct the error in wireless data links. The data link has tolerance to the interference from the power link, and both the data and power links show the waterproof property of the system.

Original languageEnglish
Title of host publicationIEEE Symposium on VLSI Circuits, Digest of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesC128-C129
Volume2015-August
ISBN (Print)9784863485020
DOIs
Publication statusPublished - 2015 Aug 31
Event29th Annual Symposium on VLSI Circuits, VLSI Circuits 2015 - Kyoto, Japan
Duration: 2015 Jun 172015 Jun 19

Other

Other29th Annual Symposium on VLSI Circuits, VLSI Circuits 2015
CountryJapan
CityKyoto
Period15/6/1715/6/19

    Fingerprint

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Kosuge, A., Hashiba, J., Kawajiri, T., Hasegawa, S., Shidei, T., Ishikuro, H., Kuroda, T., & Takeuchi, K. (2015). Inductively-powered wireless solid-state drive (SSD) system with merged error correction of high-speed non-contact data links and NAND flash memory. In IEEE Symposium on VLSI Circuits, Digest of Technical Papers (Vol. 2015-August, pp. C128-C129). [7231350] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIC.2015.7231350