Abstract
The carrier charging/discharging characteristics in a multidot Si nanocrystal floating gate memory are investigated by measuring the gate current directly. To detect a small gate current, we use a large device-size memory. In the gate current characteristics, double peak structures, with one of the peaks at the threshold voltage and the other at the flat-band voltage, are found. The separation into two peaks is shown to be due to the change of the charging/discharging carrier sources between the source/drain and the substrate in the channel depletion region. These show that the carrier charging/discharging characteristics change critically at each of the threshold voltage and the flat-band voltage. Charging/discharging rate reduction due to the surface potential flexibility and the carrier number shortage in the channel depletion region is proposed to explain the critical changes.
Original language | English |
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Pages (from-to) | 989-993 |
Number of pages | 5 |
Journal | Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers |
Volume | 39 |
Issue number | 3 A |
DOIs | |
Publication status | Published - 2000 |
Externally published | Yes |
Keywords
- Depletion
- Direct tunneling
- Double peak
- Flat-band voltage
- Floating gate
- Memory
- Nanocrystal
- Retention
- Silicon
- Threshold voltage
ASJC Scopus subject areas
- Engineering(all)
- Physics and Astronomy(all)